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cpu: pass blargh instr tests 3,5,6,8,9

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This commit is contained in:
Max Regan
2018-09-03 21:57:55 -07:00
parent c0262cba63
commit b22fc6f44a
2 changed files with 151 additions and 40 deletions
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155
src/gbemu/cpu.c
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@@ -181,14 +181,14 @@ static const unsigned int cb_extra_cycles[256] = { 0 };
#define ADC_8(cpu, dst, src) \ #define ADC_8(cpu, dst, src) \
do { \ do { \
uint16_t _tmp; \ uint16_t _dst = dst; \
uint16_t _reg = src; \ uint16_t _src = src; \
_tmp = _reg + dst + cpu->cf; \
cpu->nf = 0; \ cpu->nf = 0; \
cpu->hf = _reg + dst + cpu->cf > 0xff; \ cpu->hf = ((_src & 0xf) + (_dst & 0xf) + cpu->cf) > 0xf; \
cpu->cf = !(_tmp & 0xff); \ _dst = _src + _dst + cpu->cf; \
(dst) = _tmp; \ cpu->cf = _dst > 0xff; \
cpu->zf = !(dst); \ cpu->zf = !(_dst & 0xff); \
(dst) = _dst; \
} while (0) } while (0)
#define SUB_8(cpu, dst, src) \ #define SUB_8(cpu, dst, src) \
@@ -199,7 +199,7 @@ static const unsigned int cb_extra_cycles[256] = { 0 };
(cpu)->cf = _reg > dst; \ (cpu)->cf = _reg > dst; \
(cpu)->nf = 1; \ (cpu)->nf = 1; \
(cpu)->hf = CALC_H_SUB(dst, _reg); \ (cpu)->hf = CALC_H_SUB(dst, _reg); \
(cpu)->zf = tmp == 0; \ (cpu)->zf = !tmp; \
dst = tmp; \ dst = tmp; \
} while (0) } while (0)
@@ -207,12 +207,13 @@ static const unsigned int cb_extra_cycles[256] = { 0 };
do { \ do { \
int tmp; \ int tmp; \
uint8_t _reg = src; \ uint8_t _reg = src; \
uint8_t cf = cpu->cf; \
tmp = (dst) - (_reg) - (cpu->cf); \ tmp = (dst) - (_reg) - (cpu->cf); \
(cpu)->cf = _reg + (cpu->cf) > dst; \ (cpu)->cf = tmp < 0; \
(cpu)->nf = 1; \ (cpu)->nf = 1; \
(cpu)->hf = CALC_H_ADD(_reg, dst); \ (cpu)->hf = ((dst & 0xf) - (_reg & 0xf) - cf) < 0 ; \
(cpu)->zf = tmp == 0; \
(dst) = (tmp); \ (dst) = (tmp); \
(cpu)->zf = dst == 0; \
} while (0) } while (0)
#define AND_8(cpu, dst, src) \ #define AND_8(cpu, dst, src) \
@@ -330,6 +331,37 @@ static const unsigned int cb_extra_cycles[256] = { 0 };
reg = tmp; \ reg = tmp; \
} while (0) } while (0)
#define RLC(cpu, reg) \
do { \
uint8_t tmp = reg; \
(cpu)->nf = 0; \
(cpu)->hf = 0; \
(cpu)->cf = GET_BIT(tmp, 7); \
tmp = tmp << 1; \
tmp |= (cpu)->cf; \
(cpu)->zf = (tmp) == 0; \
reg = tmp; \
} while (0)
#define RRC(cpu, reg) \
do { \
cpu->cf = GET_BIT(reg, 0); \
cpu->nf = 0; \
cpu->hf = 0; \
(reg) >>= 1; \
WRITE_BIT(reg, 7, cpu->cf); \
cpu->zf = (reg == 0); \
} while (0)
#define SLA(cpu, reg) \
do { \
cpu->cf = GET_BIT(reg, 7); \
reg <<= 1; \
cpu->nf = 0; \
cpu->zf = !reg; \
cpu->hf = 0; \
} while (0)
#define SRL(cpu, reg) \ #define SRL(cpu, reg) \
do { \ do { \
cpu->cf = GET_BIT(reg, 0); \ cpu->cf = GET_BIT(reg, 0); \
@@ -350,6 +382,16 @@ static const unsigned int cb_extra_cycles[256] = { 0 };
cpu->hf = 0; \ cpu->hf = 0; \
} while (0) } while (0)
#define SRA(cpu, reg) \
do { \
uint8_t val = GET_BIT(reg, 7); \
cpu->cf = GET_BIT(reg, 0); \
cpu->nf = 0; \
cpu->hf = 0; \
reg = (val << 7) | (reg >> 1); \
cpu->zf = !reg; \
} while (0) \
#define SWAP(cpu, reg) \ #define SWAP(cpu, reg) \
do { \ do { \
uint8_t tmp = reg << 4; \ uint8_t tmp = reg << 4; \
@@ -428,12 +470,8 @@ int lr35902_cycle(struct lr35902_state *cpu)
LD_D8(cpu, cpu->c); LD_D8(cpu, cpu->c);
break; break;
case 0x0f: /* RRCA */ case 0x0f: /* RRCA */
cpu->cf = GET_BIT(cpu->a, 0); RRC(cpu, cpu->a);
cpu->nf = 0;
cpu->zf = 0; cpu->zf = 0;
cpu->hf = 0;
cpu->a >>= 1;
WRITE_BIT(cpu->a, 7, cpu->cf);
break; break;
case 0x10: /* STOP */ case 0x10: /* STOP */
ASSERT(0); //TODO: Implement me ASSERT(0); //TODO: Implement me
@@ -473,8 +511,8 @@ int lr35902_cycle(struct lr35902_state *cpu)
case 0x1a: /* LD A, (DE) */ case 0x1a: /* LD A, (DE) */
cpu->a = gb_mem_read(cpu->memory, cpu->de); cpu->a = gb_mem_read(cpu->memory, cpu->de);
break; break;
case 0x1b: /* DEC BC */ case 0x1b: /* DEC DE */
cpu->bc--; cpu->de--;
break; break;
case 0x1c: /* INC E */ case 0x1c: /* INC E */
INC_8(cpu, cpu->e); INC_8(cpu, cpu->e);
@@ -585,7 +623,7 @@ int lr35902_cycle(struct lr35902_state *cpu)
break; break;
case 0x36: /* LD (HL), d8 */ case 0x36: /* LD (HL), d8 */
val = gb_mem_read(cpu->memory, cpu->pc++); val = gb_mem_read(cpu->memory, cpu->pc++);
gb_mem_write(cpu->memory, cpu->hl++, val); gb_mem_write(cpu->memory, cpu->hl, val);
break; break;
case 0x37: /* SCF */ case 0x37: /* SCF */
cpu->nf = 0; cpu->nf = 0;
@@ -618,6 +656,8 @@ int lr35902_cycle(struct lr35902_state *cpu)
LD_D8(cpu, cpu->a); LD_D8(cpu, cpu->a);
break; break;
case 0x3f: /* CCF */ case 0x3f: /* CCF */
cpu->nf = 0;
cpu->hf = 0;
cpu->cf = !cpu->cf; cpu->cf = !cpu->cf;
break; break;
case 0x40: /* LD B,B */ case 0x40: /* LD B,B */
@@ -830,7 +870,7 @@ int lr35902_cycle(struct lr35902_state *cpu)
ADD_8(cpu, cpu->a, cpu->a); ADD_8(cpu, cpu->a, cpu->a);
break; break;
case 0x88: /* ADC A,B */ case 0x88: /* ADC A,B */
ADC_8(cpu, cpu->a, cpu->a); ADC_8(cpu, cpu->a, cpu->b);
break; break;
case 0x89: /* ADC A,C */ case 0x89: /* ADC A,C */
ADC_8(cpu, cpu->a, cpu->c); ADC_8(cpu, cpu->a, cpu->c);
@@ -1054,22 +1094,57 @@ int lr35902_cycle(struct lr35902_state *cpu)
cycles = cb_extra_cycles[inst]; cycles = cb_extra_cycles[inst];
switch (inst) { switch (inst) {
case 0x00: case 0x00:
RLC(cpu, cpu->b);
break;
case 0x01: case 0x01:
RLC(cpu, cpu->c);
break;
case 0x02: case 0x02:
RLC(cpu, cpu->d);
break;
case 0x03: case 0x03:
RLC(cpu, cpu->e);
break;
case 0x04: case 0x04:
RLC(cpu, cpu->h);
break;
case 0x05: case 0x05:
RLC(cpu, cpu->l);
break;
case 0x06: case 0x06:
val = gb_mem_read(cpu->memory, cpu->hl);
RLC(cpu, val);
gb_mem_write(cpu->memory, cpu->hl, val);
break;
case 0x07: case 0x07:
RLC(cpu, cpu->a);
break;
case 0x08: case 0x08:
RRC(cpu, cpu->b);
break;
case 0x09: case 0x09:
RRC(cpu, cpu->c);
break;
case 0x0a: case 0x0a:
RRC(cpu, cpu->d);
break;
case 0x0b: case 0x0b:
RRC(cpu, cpu->e);
break;
case 0x0c: case 0x0c:
RRC(cpu, cpu->h);
break;
case 0x0d: case 0x0d:
RRC(cpu, cpu->l);
break;
case 0x0e: case 0x0e:
val = gb_mem_read(cpu->memory, cpu->hl);
RLC(cpu, val);
gb_mem_write(cpu->memory, cpu->hl, val);
break;
case 0x0f: case 0x0f:
ASSERT(0); RRC(cpu, cpu->a);
break;
case 0x10: case 0x10:
RL(cpu, cpu->b); RL(cpu, cpu->b);
break; break;
@@ -1119,21 +1194,57 @@ int lr35902_cycle(struct lr35902_state *cpu)
RR(cpu, cpu->a); RR(cpu, cpu->a);
break; break;
case 0x20: case 0x20:
SLA(cpu, cpu->b);
break;
case 0x21: case 0x21:
SLA(cpu, cpu->c);
break;
case 0x22: case 0x22:
SLA(cpu, cpu->d);
break;
case 0x23: case 0x23:
SLA(cpu, cpu->e);
break;
case 0x24: case 0x24:
SLA(cpu, cpu->h);
break;
case 0x25: case 0x25:
SLA(cpu, cpu->l);
break;
case 0x26: case 0x26:
val = gb_mem_read(cpu->memory, cpu->hl);
SLA(cpu, val);
gb_mem_write(cpu->memory, cpu->hl, val);
break;
case 0x27: case 0x27:
SLA(cpu, cpu->a);
break;
case 0x28: case 0x28:
SRA(cpu, cpu->b);
break;
case 0x29: case 0x29:
SRA(cpu, cpu->c);
break;
case 0x2a: case 0x2a:
SRA(cpu, cpu->d);
break;
case 0x2b: case 0x2b:
SRA(cpu, cpu->e);
break;
case 0x2c: case 0x2c:
SRA(cpu, cpu->h);
break;
case 0x2d: case 0x2d:
SRA(cpu, cpu->l);
break;
case 0x2e: case 0x2e:
val = gb_mem_read(cpu->memory, cpu->hl);
SRA(cpu, val);
gb_mem_write(cpu->memory, cpu->hl, val);
break;
case 0x2f: case 0x2f:
SRA(cpu, cpu->a);
break;
case 0x30: case 0x30:
SWAP(cpu, cpu->b); SWAP(cpu, cpu->b);
break; break;
@@ -1442,7 +1553,7 @@ int lr35902_cycle(struct lr35902_state *cpu)
case 0xcd: /* CALL */ case 0xcd: /* CALL */
CALL(cpu); CALL(cpu);
break; break;
case 0xce: case 0xce: /* ADC A, d8 */
val = gb_mem_read(cpu->memory, cpu->pc++); val = gb_mem_read(cpu->memory, cpu->pc++);
ADC_8(cpu, cpu->a, val); ADC_8(cpu, cpu->a, val);
break; break;

2
src/gbemu/video.c
View File

@@ -66,7 +66,7 @@ static void gb_video_screenshot(struct gb_video *video)
uint8_t tile; uint8_t tile;
int log = id == 30; int log = id == 30;
snprintf(filename, sizeof(filename), "screenshot-%d.bmp", id++); snprintf(filename, sizeof(filename), "screenshot-%05d.bmp", id++);
if (!(video->lcdcont & 1)) { if (!(video->lcdcont & 1)) {
goto out; goto out;