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# Release Notes for STM32L4xx CMSIS

Copyright 2017 STMicroelectronics

## License

This software component is licensed by ST under BSD 3-Clause license, the "License"; You may not use this component except in compliance with the License. You may obtain a copy of the License at:

https://opensource.org/licenses/BSD-3-Clause

### V1.5.0 / 27-July-2018

#### Main Changes

- Add the support of STM32L412xx/STM32L422x devices

- Add stm32l412xx.h and stm32l422xx.h device description files
- Add startup files startup_stm32l412xx.s and startup_stm32l422xx.s for EWARM, MDK-ARM and SW4STM32 toolchains
- Add EWARM associated linker files for execution from internal RAM or internal FLASH

- stm32l4xx.h

- Add the following device defines:

- "#define STM32L412xx" for all STM32L412xx devices
- "#define STM32L422xx" for all STM32L422xx devices

- stm32l4r5xx.h, stm32l4r7xx.h, stm32l4r9xx.h, stm32l4s5xx.h, stm32l4s7xx.h and stm32l4s9xx.h description files

- Update SDMMC mask register
- Correct SDMMC DPSMACT and CPSMACT bits definition

- All stm32l4XXxx.h device description files except stm32l4rXxx.h and stm32l4sXxx.h

- Correct Misra C:2012 Rule10.3 warning in replacing 0xFFUL by 0xFFU when CRC IDR register is 8-bit long only

- All iar/linker/stm32l4XXxx_flash.icf and iar/linker/stm32l4XXxx_sram.icf

- Remove SRAM1 and SRAM2 (and SRAM3 for stm32l4rXxx_flash.icf, stm32l4sXxx_flash.icf, stm32l4rXxx_sram.icf and stm32l4sXxx_sram.icf) start and end addresses from ICF editor section
- Define RAM section as covering whole SRAM1 plus SRAM2 (and SRAM3 when applicable) when the SRAM regions are contiguous

## Update History

### V1.4.3 / 30-April-2018

Main Changes

- all stm32l4XXxx.h device description files

- Fix DFSDM_FLTICR_CLRSCDF definition
- Cleanup USB Host & Device bit definitions
- [MISRAC2012-Rule-10.6] Use 'UL' postfix for _Msk definitions and memory/peripheral base addresses

- stm32l4r5xx.h, stm32l4r7xx.h, stm32l4r9xx.h, stm32l4s5xx.h, stm32l4s7xx.h and stm32l4s9xx.h devices description files

- Fix SDMMC_STA_DPSMACT and SDMMC_STA_CPSMACT definitions (V1.4.1 update was incorrect)

- all stm32l4XXxx.h device description files except stm32l4r5xx.h, stm32l4r7xx.h, stm32l4r9xx.h, stm32l4s5xx.h, stm32l4s7xx.h and stm32l4s9xx.h

- Add missing USART_CR3_UCESM bit definition

### V1.4.2 / 22-December-2017

Main Changes

- SPI_TypeDef cleanup of Reserved fields.

### V1.4.1 / 6-October-2017

Main Changes

- stm32l4r5xx.h and stm32l4s5xx.h description files

- Remove LTDC peripheral definitions as LTDC not available on STM32L4R5xx/STM32L4S5xx devices

### V1.4.0 / 25-August-2017

Main Changes

- Add the support of STM32L4R5xx/STM32L4R7xx/STM32L4R9xx/STM32L4S5xx/STM32L4S7xx/STM32L4S9xx devices

- Add stm32l4r5xx.h, stm32l4r7xx.h, stm32l4r9xx.h, stm32l4s5xx.h, stm32l4s7xx.h and stm32l4s9xx.h device description files
- Add startup files startup_stm32l4r5xx.s, startup_stm32l4r7xx.s, startup_stm32l4r9xx.s, startup_stm32l4s5xx.s, startup_stm32l4s7xx.s and startup_stm32l4s9xx.s for EWARM, MDK-ARM and SW4STM32 toolchains
- Add EWARM associated linker files for execution from internal RAM or internal FLASH

- stm32l4xx.h

- Add the following device defines:

- "#define STM32L4R5xx" for all STM32L4R5xx devices
- "#define STM32L4R7xx" for all STM32L4R7xx devices
- "#define STM32L4R9xx" for all STM32L4R9xx devices
- "#define STM32L4S5xx" for all STM32L4S5xx devices
- "#define STM32L4S7xx" for all STM32L4S7xx devices
- "#define STM32L4S9xx" for all STM32L4S9xx devices

- all adequate stm32l4XXxx.h device description files

- PWR: Rename PWR_CR3_EIWF to PWR_CR3_EIWUL
- TIM: Add missing TIM8 check in debug macro IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE() devices
- USB: Fix USB_EP0R...USB_EP7R definitions

- system_stm32l4xx.c

- Fix MISRA C 2004 rule 10.6 : a 'U' suffix shall be applied to all constants of 'unsigned' type

### V1.3.2 / 16-June-2017

Main Changes

- stm32l451xx.h, stm32l452xx.h, stm32l462xx.h description files

- Remove EXTI_IMR2_IM34 and EXTI_EMR2_IM34 bits (no SWPMI EXTI line)

- stm32l432xx.h, stm32l442xx.h, stm32l452xx.h, stm32l462xx.h description files

- Remove EXTI_IMR2_IM36 and EXTI_EMR2_IM36 bits from STM32L4x2x devices (no PVM2 EXTI line)

- stm32l431xx.h, stm32l432xx.h, stm32l442xx.h, stm32l451xx.h, stm32l452xx.h, stm32l462xx.h, stm32l471xx.h, stm32l475xx.h, stm32l485xx.h description files

- Remove EXTI_IMR2_IM39 and EXTI_EMR2_IM39 bits from STM32L4x1x, STM32L4x2x and STM32L4x5x devices (no LCD EXTI line)

- all stm32l4XXxx.h device description files

- Remove erroneous SRAM2_BB_BASE definition
- Add missing EXTI_EMR2_EM constants
- Add missing TIM8 check in debug macro IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE() devices where TIM8 is present

### V1.3.1 / 21-April-2017

Main Changes

- stm32l496xx.h and stm32l4a6xx.h device description files

- FIREWALL

- Fix FW_VDSSA_ADD_Msk and FW_VDSL_LENG_Msk definitions

- TIM16

- Fix TIM16_OR1_TI1_RMP_Msk definition

### V1.3.0 / 17-February-2017

Main Changes

- Add the support of STM32L496xx/STM32L4A6xx devices

- Add stm32l496xx.h and stm32l4a6xx.h device description files
- Add startup files startup_stm32l496xx.s and startup_stm32l4a6xx.s for EWARM, MDK-ARM and SW4STM32 toolchains
- Add linker files stm32l496xx_flash.icf, stm32l496xx_sram.icf, stm32l4a6xx_flash.icf and stm32l4a6xx_sram.icf used within EWARM workspaces

- stm32l4xx.h

- Add the following device defines:

- "#define STM32L496xx" for all STM32L496xx devices

- "#define STM32L4A6xx" for all STM32L4A6xx devices

- all stm32l4XXxx.h device description files

- Fix RCC_CRRCR_HSI48CAL_Pos and RCC_CRRCR_HSI48CAL values

### V1.2.0 / 28-October-2016

Main Changes

- Add the support of STM32L451xx/STM32L452xx/STM32L462xx devices

- Add stm32l451xx.h, stm32l452xx.h and stm32l462xx.h device description files
- Add startup files startup_stm32l451xx.s, startup_stm32l452xx.s and startup_stm32l462xx.s for EWARM, MDK-ARM and SW4STM32 toolchains
- Add linker files stm32l451xx_flash.icf, stm32l451xx_sram.icf, stm32l452xx_flash.icf, stm32l452xx_sram.icf, stm32l462xx_flash.icf and stm32l462xx_sram.icf used within EWARM workspaces

- stm32l4xx.h

- Add the following device defines:

- "#define STM32L451xx" for all STM32L451xx devices

- "#define STM32L452xx" for all STM32L452xx devices

- "#define STM32L462xx" for all STM32L462xx devices

- all stm32l4XXxx.h device description files except stm32l451xx.h, stm32l452xx.h and stm32l462xx.h

- Add DAC_CHANNEL2_SUPPORT definition as DAC channel 2 is present on these devices

- stm32l432xx.h and stm32l442xx.h device description files

- Remove PWR_CR2_PVME1 and PWR_SR2_PVMO1 as VDDUSB is internally connected to VDD on these devices thus no PVM1

- stm32l475xx.h, stm32l476xx.h, stm32l485xx.h and stm32l486xx.h device description files

- Remove USB OTG Core Id version definitions USB_OTG_CORE_ID_310A and USB_OTG_CORE_ID_320A as reserved for internal usage

### V1.1.2 / 12-September-2016

Main Changes

- Fix DAC_SR_BWST1 bit definition
- Fix SDMMC_DCTRL_DBLOCKSIZE_2 and SDMMC_DCTRL_DBLOCKSIZE_3 bits definition
- USB OTG FS

- Add GSNPSID, GHWCFG1 and GHWCFG2 register mapping
- Add USB OTG Core Id version definitions: USB_OTG_CORE_ID_310A and USB_OTG_CORE_ID_320A

### V1.1.1 / 29-April-2016

Main Changes

- All device register description files enriched with _Pos and _Msk defines to be used with _VAL2FLD(field, value) and _FLD2VAL(field, value) from CMSIS Core (previous defines are kept for compatibility)
- stm32l471xx.h, stm32l475xx.h, stm32l476xx.h, stm32l485xx.h and stm32l486xx.h device description files

- Update DFSDM peripheral instance and register definitions (named DFSDM1 peripheral from now instead of DFSDM)

- Rename DFSDMx_IRQn to DFSDM1_FLTx_IRQn for x=0,1,2 and 3 (filters)

- Rename DFSDM channels and filters to refer to DFSDM1 peripheral instance with DFSDM1 prefix

- DFSDM1_Channel0, DFSDM1_Channel1, ... DFSDM1_Channel7

- DFSDM1_Filter0, DFSDM1_Filter1, ..., DFSDM1_Filter3

- Rename registers in DFSDM_Filter_TypeDef to use FLT prefix for filter

- FLTCR1, FLTCR2, FLTISR, FLTICR, FLTJCHGR, FLTFCR, FLTJDATAR, FLTRDATAR, FLTAWHTR, FLTAWLTR, FLTAWSR, FLTAWCFR, FLTEXMAX, FLTEXMIN, FLTCNVTIMR

- Rename register in DFSDM_Filter_TypeDef to use CH prefix for channel

- CHAWSCDR

- Update RCC definitions for DFSDM1

- Rename RCC_APB2RSTR_DFSDMRST to RCC_APB2RSTR_DFSDM1RST

- Rename RCC_APB2ENR_DFSDMEN to RCC_APB2ENR_DFSDM1EN

- Rename RCC_APB2SMENR_DFSDMSMEN to RCC_APB2SMENR_DFSDM1SMEN

- Rename RCC_CCIPR_DFSDMSEL to RCC_CCIPR_DFSDM1SEL

- Update TIM definitions for DFSDM1

- Rename TIM1_OR2_BKDFBK0E to TIM1_OR2_BKDF1BK0E

- Rename TIM1_OR3_BK2DFBK1E to TIM1_OR3_BK2DF1BK1E

- Rename TIM8_OR2_BKDFBK2E to TIM8_OR2_BKDF1BK2E

- Rename TIM8_OR3_BK2DFBK3E to TIM8_OR3_BK2DF1BK3E

- Rename TIM15_OR2_BKDFBK0E to TIM15_OR2_BKDF1BK0E

- Rename TIM16_OR2_BKDFBK1E to TIM16_OR2_BKDF1BK1E

- Rename TIM17_OR2_BKDFBK2E to TIM17_OR2_BKDF1BK2E

- FMC

- Add FMC_BWTRx_BUSTURN register bit definition

- startup_stm32l471xx.s, startup_stm32l475xx.s, startup_stm32l476xx.s, startup_stm32l485xx.s and startup_stm32l486xx.s

- Rename DFSDMx_IRQHandler function entry points to DFSDM1_FLTx_IRQHandler for x=0,1,2 and 3 (filters)

### V1.1.0 / 26-February-2016

Main Changes

- Add the support of STM32L431xx/STM32L432xx/STM32L433xx/STM32L442xx/STM32L443xx devices

- Add stm32l431xx.h, stm32l432xx.h, stm32l433xx.h, stm32l442xx.h and stm32l443xx.h device description files
- Add startup files startup_stm32l431xx.s, startup_stm32l432xx.s, startup_stm32l433xx.s, startup_stm32l442xx.s and startup_stm32l443xx.s for EWARM, MDK-ARM and SW4STM32 toolchains
- Add linker files stm32l431xx_flash.icf, stm32l431xx_sram.icf, stm32l432xx_flash.icf, stm32l432xx_sram.icf, stm32l433xx_flash.icf, stm32l433xx_sram.icf, stm32l442xx_flash.icf, stm32l442xx_sram.icf, stm32l443xx_flash.icf and stm32l443xx_sram.icf used within EWARM workspaces

- stm32l4xx.h

- Add the following device defines:

- "#define STM32L431xx" for all STM32L431xx devices

- "#define STM32L432xx" for all STM32L432xx devices

- "#define STM32L433xx" for all STM32L433xx devices

- "#define STM32L442xx" for all STM32L442xx devices

- "#define STM32L443xx" for all STM32L443xx devices

- stm32l471xx.h, stm32l475xx.h, stm32l476xx.h, stm32l485xx.h and stm32l486xx.h device description files

- DFSDM - alignment with registers & bits naming used in documentation

- Rename DFSDM_AWSCDR_WDATA to DFSDM_CHWDATR_WDATA
- Rename DFSDM_AWSCDR_INDAT0 to DFSDM_CHDATINR_INDAT0
- Rename DFSDM_AWSCDR_INDAT0 to DFSDM_CHDATINR_INDAT0

### V1.0.3 / 29-January-2016

Main Changes

- stm32l471xx.h, stm32l475xx.h, stm32l476xx.h, stm32l485xx.h and stm32l486xx.h device description files

- Apply MISRA C 2004 rule 10.6 ('U' suffix added)
- Add PACKAGE_BASE, UID_BASE and FLASHSIZE_BASE base address definitions
- ADC

- Update ADC_CSR register bit definition

- LPUART

- Add IS_LPUART_INSTANCE() to check USART instance with low power capatibility

- system_stm32l4xx.h/.c

- Add declaration of APB Prescaler table values (const uint8_t APBPrescTable[8])

### V1.0.2 / 25-November-2015

Main Changes

- stm32l471xx.h, stm32l475xx.h, stm32l476xx.h, stm32l485xx.h and stm32l486xx.h device description files

- GPIO

- Align GPIO register bit definitions with RM0351 (legacy definitions preserved for compatibility)

- FMC

- Remove FMC_BCR1_WFDIS bit definition (write fifo feature not available)

- PWR

- Stop 0 mode introduction

- PWR_CR1_LPMS_STOP1MR renamed to PWR_CR1_LPMS_STOP0
- PWR_CR1_LPMS_STOP1LPR renamed to PWR_CR1_LPMS_STOP1

- RCC
  - Align RCC register bit definitions with RM0351 (legacy definitions preserved for compatibility)
- TIM

- Add IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE() to check timer instance capability for hall sensor interface

- system_stm32l4xx.c

- Fix PLLCFGR default value in SystemInit()

### V1.0.1 / 16-September-2015

Main Changes

- stm32l471xx.h, stm32l475xx.h, stm32l476xx.h, stm32l485xx.h and stm32l486xx.h device description files

- DBGMCU

- Fix DBGMCU_IDCODE_DEV_ID mask definition

- FLASH

- Add FLASH_OPTR_nRST_SHDW bit definition

- I2C

- Fix naming I2C_CR1_DNF instead of I2C_CR1_DFN

- TIM

- Add TIM16_OR2_BKDFBK1E bit definition

- Add TIM17_OR2_BKDFBK2E bit definition

- system_stm32l4xx.c

- SystemCoreClockUpdate() corrected for SystemCoreClock computation when PLL is enabled

### V1.0.0 / 26-June-2015

Main Changes

- First official release for STM32L471xx, STM32L475xx, STM32L476xx, STM32L485xx and STM32L486xx devices

For complete documentation on STM32 Microcontrollers, visit: www.st.com/STM32