diff --git a/test.c b/test.c
index 6bb5fd6..577809e 100644
--- a/test.c
+++ b/test.c
@@ -73,8 +73,6 @@ void SystemInit()
      */
     RCC->CFGR &= ~RCC_CFGR_PLLSRC & ~RCC_CFGR_PLLMUL & ~RCC_CFGR_PLLDIV;
 
-    /* Enable APB1 for LPTIM */
-    RCC->APB1ENR |= RCC_APB1ENR_LPTIM1EN;
 
     /*!< Disable all interrupts */
     RCC->CIER = 0x00000000;
@@ -85,10 +83,13 @@ void SystemInit()
 
 void init_lptim()
 {
+    /* Enable APB1 for LPTIM */
+    RCC->APB1ENR |= RCC_APB1ENR_LPTIM1EN;
+
     // Enable low-speed internal
     RCC->CSR |= RCC_CSR_LSION;
-
     while (!(RCC->CSR & RCC_CSR_LSIRDY)) {};
+
     /*!< Set the LSI clock to be the source of the LPTIM */
     RCC->CCIPR &= ~RCC_CCIPR_LPTIM1SEL;
     RCC->CCIPR |=  RCC_CCIPR_LPTIM1SEL_0;
@@ -118,7 +119,6 @@ void init_lptim()
     LPTIM1->CFGR &= LPTIM_CFGR_PRESC;
     LPTIM1->CFGR |= 7u << LPTIM_CFGR_PRESC_Pos;
 
-
     LPTIM1->CR |= LPTIM_CR_ENABLE;
 
     /*!< Do not modify ARR and CMP until after ENABLE bit is set */
@@ -134,7 +134,69 @@ void init_lptim()
 }
 
 /*!< The buffer that will be used in the future to display on the watch display. */
-static uint8_t display_buffer[144 * 168 / 8];
+//static uint8_t display_buffer[144 * 168 / 8];
+
+void init_lptim_toggler() {
+    init_lptim();
+
+    /* Assign LPTIM1_OUT to PA7 */
+    GPIOA->AFR[0] &= ~GPIO_AFRL_AFRL7;
+    GPIOA->AFR[0] |= 1 << GPIO_AFRL_AFRL7_Pos;
+
+    GPIOA->MODER &= ~GPIO_MODER_MODE7;
+    GPIOA->MODER |=  2u << GPIO_MODER_MODE7_Pos;
+
+    GPIOA->OTYPER &= ~GPIO_OTYPER_OT_7;
+    GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD7;
+}
+
+void init_spi_display()
+{
+    RCC->APB2ENR = RCC_APB2ENR_SPI1EN;
+
+    GPIOB->OSPEEDR = ~0;
+
+    /* Assign SPI_MOSI to PA12 (AFRH5), since PA7 is taken by LPTIM_OUT */
+    GPIOA->AFR[1] &= ~GPIO_AFRH_AFRH4;
+
+    GPIOA->MODER &= ~GPIO_MODER_MODE12;
+    GPIOA->MODER |=  2u << GPIO_MODER_MODE12_Pos;
+
+    GPIOA->OTYPER &= ~GPIO_OTYPER_OT_12;
+    GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD12;
+
+    // SPI1 NSS
+    GPIOA->AFR[0] &= ~GPIO_AFRL_AFRL4;
+
+    GPIOA->MODER &= ~GPIO_MODER_MODE4;
+    GPIOA->MODER |=  2u << GPIO_MODER_MODE4_Pos;
+
+    GPIOA->OTYPER &= ~GPIO_OTYPER_OT_4;
+    GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD4;
+    // enable pullup, since the pin doesn't seem to stay up
+    GPIOA->PUPDR |= 2u << GPIO_PUPDR_PUPD4_Pos;
+
+    // SPI1 SCK
+    GPIOA->AFR[0] &= ~GPIO_AFRL_AFRL5;
+
+    GPIOA->MODER &= ~GPIO_MODER_MODE5;
+    GPIOA->MODER |=  2u << GPIO_MODER_MODE5_Pos;
+
+    GPIOA->OTYPER &= ~GPIO_OTYPER_OT_5;
+    GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD5;
+
+    // SPI1 MISO
+    GPIOA->AFR[0] &= ~GPIO_AFRL_AFRL6;
+
+    GPIOA->MODER &= ~GPIO_MODER_MODE6;
+    GPIOA->MODER |=  2u << GPIO_MODER_MODE6_Pos;
+
+    GPIOA->OTYPER &= ~GPIO_OTYPER_OT_6;
+    GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD6;
+
+    SPI1->CR1 |= SPI_CR1_SPE | SPI_CR1_MSTR | SPI_CR1_SSOE;// | SPI_CR1_SSM | SPI_CR1_SSI;
+    // SPI1->CR1 |= SPI_CR1_BR;
+}
 
 int main() {
     /** Enable Port A,B clock */
@@ -148,28 +210,19 @@ int main() {
     GPIOB->OTYPER &= ~GPIO_OTYPER_OT_3;
     GPIOB->PUPDR &= GPIO_PUPDR_PUPD3;
 
-    init_lptim();
+    init_lptim_toggler();
+    init_spi_display();
 
-    /* Assign LPTIM1_OUT to PB3 (D13 on the Nucleo board) */
-    GPIOA->AFR[0] &= ~GPIO_AFRL_AFRL7;
-    GPIOA->AFR[0] |= 1 << GPIO_AFRL_AFRL7_Pos;
+    // GPIOB->ODR |= GPIO_ODR_OD3;
+    // for (volatile int i = 0; i < 100000; i++) {}
+    // GPIOB->ODR &= ~GPIO_ODR_OD3;
 
-    GPIOA->MODER &= ~GPIO_MODER_MODE7;
-    GPIOA->MODER |=  2u << GPIO_MODER_MODE7_Pos; // Alternate Functionb
-
-    GPIOA->OTYPER &= ~GPIO_OTYPER_OT_7;
-    GPIOA->PUPDR &= GPIO_PUPDR_PUPD7;
-
-    for ( uint32_t i = 0; i < ARRAY_SIZE(display_buffer); i++) {
-        display_buffer[i] = 0;
-    }
     while (1) {
-// #ifndef USE_PWM
-        for ( uint32_t i = 0; i < ARRAY_SIZE(display_buffer) - 1; i++) {
-            display_buffer[i] = display_buffer[i + 1] + 1;
+        if (SPI1->SR & SPI_SR_TXE) {
+            SPI1->DR = 0xA5;
+            GPIOB->ODR |= GPIO_ODR_OD3;
+        } else {
+            GPIOB->ODR &= ~GPIO_ODR_OD3;
         }
-        for (uint32_t i = 0; i < 1000000; i++) {}
-        GPIOB->ODR ^= (GPIO_ODR_OD3);
-// #endif
     }
 }