Hack in support for other boards/microcontrollers, add GpioDriver
There's definitely plenty of cleanup work to be done (see: "ifdefs").
This commit is contained in:
215
firmware/Bsp/Drivers/GpioDriver.cpp
Normal file
215
firmware/Bsp/Drivers/GpioDriver.cpp
Normal file
@@ -0,0 +1,215 @@
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#include "Bsp/Drivers/GpioDriver.h"
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#include "Bsp/macros.h"
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namespace BSP {
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/*********************************************
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*
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* GpioPin
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*
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*********************************************/
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GpioDriver::GpioDriver(GPIO_TypeDef *gpio)
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: m_gpio(gpio)
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{}
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void GpioDriver::init() {
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return;
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}
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void GpioDriver::enable() {
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#if defined(STM32L0XX)
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if (m_gpio == GPIOA) {
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SET(RCC->IOPENR, RCC_IOPENR_IOPAEN);
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} else if (m_gpio == GPIOB) {
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SET(RCC->IOPENR, RCC_IOPENR_IOPBEN);
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} else if (m_gpio == GPIOC) {
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SET(RCC->IOPENR, RCC_IOPENR_IOPCEN);
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} else if (m_gpio == GPIOH) {
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SET(RCC->IOPENR, RCC_IOPENR_IOPHEN);
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}
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#elif defined(STM32L4XX)
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if (m_gpio == GPIOA) {
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SET(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN);
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} else if (m_gpio == GPIOB) {
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SET(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN);
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} else if (m_gpio == GPIOC) {
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SET(RCC->AHB2ENR, RCC_AHB2ENR_GPIOCEN);
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} else if (m_gpio == GPIOH) {
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SET(RCC->AHB2ENR, RCC_AHB2ENR_GPIOHEN);
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}
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#else
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#error "Unknown device family"
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#endif
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}
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void GpioDriver::disable() {
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#if defined(STM32L0XX)
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if (m_gpio == GPIOA) {
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CLR(RCC->IOPENR, RCC_IOPENR_IOPAEN);
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} else if (m_gpio == GPIOB) {
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CLR(RCC->IOPENR, RCC_IOPENR_IOPBEN);
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} else if (m_gpio == GPIOC) {
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CLR(RCC->IOPENR, RCC_IOPENR_IOPCEN);
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} else if (m_gpio == GPIOH) {
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CLR(RCC->IOPENR, RCC_IOPENR_IOPHEN);
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}
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#elif defined(STM32L4XX)
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if (m_gpio == GPIOA) {
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CLR(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN);
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} else if (m_gpio == GPIOB) {
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CLR(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN);
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} else if (m_gpio == GPIOC) {
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CLR(RCC->AHB2ENR, RCC_AHB2ENR_GPIOCEN);
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} else if (m_gpio == GPIOH) {
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CLR(RCC->AHB2ENR, RCC_AHB2ENR_GPIOHEN);
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}
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#else
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#error "Unknown device family"
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#endif
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}
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void GpioDriver::set_pin_moder(uint32_t index, moder_t mode) {
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uint32_t moder_value = 0;
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switch (mode) {
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case moder_t::INPUT:
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moder_value = 0;
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break;
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case moder_t::OUTPUT:
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moder_value = 1;
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break;
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case moder_t::ALTERNATE_FUNCTION:
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moder_value = 2;
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break;
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}
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SET_STRIDE_TO(m_gpio->MODER, 2, index, moder_value);
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}
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void GpioDriver::set_pin_pupdr(uint32_t index, input_pull_t pull_mode) {
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uint32_t pupdr_value = 0;
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switch (pull_mode) {
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case input_pull_t::FLOATING:
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pupdr_value = 0;
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break;
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case input_pull_t::PULL_UP:
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pupdr_value = 1;
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break;
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case input_pull_t::PULL_DOWN:
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pupdr_value = 2;
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break;
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}
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SET_STRIDE_TO(m_gpio->PUPDR, 2, index, pupdr_value);
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}
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void GpioDriver::set_pin_otyper(uint32_t index, output_mode_t mode) {
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uint32_t mask = 1 << index;
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if (mode == output_mode_t::OPEN_DRAIN) {
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SET(m_gpio->OTYPER, mask);
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} else {
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SET(m_gpio->OTYPER, mask);
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}
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}
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void GpioDriver::set_pin_ospeedr(uint32_t index, output_speed_t speed) {
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uint32_t speed_val = 0;
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if (speed == output_speed_t::LOW) {
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speed_val = 0;
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} else if (speed == output_speed_t::MEDIUM) {
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speed_val = 1;
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} else if (speed == output_speed_t::HIGH) {
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speed_val = 2;
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} else if (speed == output_speed_t::VERY_HIGH) {
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speed_val = 3;
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}
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SET_STRIDE_TO(m_gpio->OSPEEDR, 2, index, speed_val);
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}
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void GpioDriver::configure_pin_input(uint32_t index, input_pull_t pull_mode) {
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if (index > 15) {
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return;
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}
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set_pin_pupdr(index, pull_mode);
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set_pin_moder(index, moder_t::INPUT);
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}
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void GpioDriver::configure_pin_output(uint32_t index, output_mode_t mode, output_speed_t speed) {
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if (index > 15) {
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return;
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}
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set_pin_moder(index, moder_t::INPUT); // Avoid glitches during configuration
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set_pin_otyper(index, mode);
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set_pin_ospeedr(index, speed);
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set_pin_moder(index, moder_t::OUTPUT);
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}
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void GpioDriver::configure_pin_alternate_function(uint32_t index, uint32_t function) {
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if (index > 15) {
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return;
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}
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if (function > 7) {
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return;
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}
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set_pin_moder(index, moder_t::INPUT); // Avoid glitches during configuration
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if (index < 8) {
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SET_STRIDE_TO(m_gpio->AFR[0], 4, index, function);
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} else {
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SET_STRIDE_TO(m_gpio->AFR[1], 4, index - 8, function);
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}
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set_pin_moder(index, moder_t::ALTERNATE_FUNCTION);
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}
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bool GpioDriver::read_pin(uint32_t index) {
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return (m_gpio->IDR >> index) & 1;
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}
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void GpioDriver::write_pin(uint32_t index, bool value) {
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SET_STRIDE_TO(m_gpio->ODR, 1, index, value);
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}
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/*********************************************
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*
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* GpioPin
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*
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*********************************************/
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GpioPin::GpioPin(GpioDriver &driver, uint32_t index)
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: m_gpio(driver)
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, m_index(index)
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{}
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void GpioPin::configure_input(GpioDriver::input_pull_t pull_mode) {
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m_gpio.configure_pin_input(m_index, pull_mode);
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}
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void GpioPin::configure_output(GpioDriver::output_mode_t mode, GpioDriver::output_speed_t speed) {
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m_gpio.configure_pin_output(m_index, mode, speed);
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}
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void GpioPin::configure_alternate_function(uint32_t function) {
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m_gpio.configure_pin_alternate_function(m_index, function);
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}
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bool GpioPin::read() {
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return m_gpio.read_pin(m_index);
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}
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void GpioPin::write(bool val) {
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return m_gpio.write_pin(m_index, val);
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}
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uint32_t GpioPin::get_index() {
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return m_index;
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}
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GpioDriver& GpioPin::get_driver() {
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return m_gpio;
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}
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}
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101
firmware/Bsp/Drivers/GpioDriver.h
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101
firmware/Bsp/Drivers/GpioDriver.h
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@@ -0,0 +1,101 @@
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/*
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* Copyright (C) 2019 Max Regan
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#pragma once
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#include "Bsp/ReturnCode.h"
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#include "Bsp/TaskScheduler.h"
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#include "Mcu.h"
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namespace BSP {
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class GpioDriver {
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public:
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GpioDriver(GPIO_TypeDef *gpio);
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void init();
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void enable();
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void disable();
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enum class output_mode_t {
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PUSH_PULL,
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OPEN_DRAIN,
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};
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enum class output_speed_t {
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LOW,
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MEDIUM,
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HIGH,
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VERY_HIGH,
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};
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enum class input_pull_t {
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FLOATING,
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PULL_UP,
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PULL_DOWN,
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};
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friend class GpioPin;
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private:
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enum class moder_t {
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INPUT,
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OUTPUT,
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ALTERNATE_FUNCTION,
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};
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void set_pin_moder(uint32_t index, moder_t mode);
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void set_pin_pupdr(uint32_t index, input_pull_t pull_mode);
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void set_pin_otyper(uint32_t index, output_mode_t mode);
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void set_pin_ospeedr(uint32_t index, output_speed_t speed);
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void configure_pin_input(uint32_t index, input_pull_t pull_mode);
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void configure_pin_output(uint32_t index, output_mode_t mode, output_speed_t speed);
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void configure_pin_alternate_function(uint32_t index, uint32_t function);
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void write_pin(uint32_t index, bool value);
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bool read_pin(uint32_t index);
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GPIO_TypeDef * const m_gpio;
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};
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class GpioPin {
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public:
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GpioPin(GpioDriver &m_driver, uint32_t index);
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void configure_input(GpioDriver::input_pull_t pull_mode);
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void configure_output(GpioDriver::output_mode_t mode, GpioDriver::output_speed_t speed);
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void configure_alternate_function(uint32_t function);
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void write(bool value);
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bool read();
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GpioDriver &get_driver();
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uint32_t get_index();
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private:
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GpioDriver &m_gpio;
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uint32_t const m_index;
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};
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}
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@@ -23,7 +23,7 @@
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#include "Bsp/Drivers/LowPower.h"
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#include "Bsp/macros.h"
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#include "stm32l0xx.h"
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#include "Mcu.h"
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uint32_t wakeups = 0;
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@@ -56,7 +56,12 @@ ReturnCode LowPower::disable_debug()
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CLR(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
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CLR(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
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#if defined(STM32L0XX)
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CLR(RCC->APB2SMENR, RCC_APB2SMENR_DBGSMEN);
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#elif defined(STM32L4XX)
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#else
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#error "Unsupported device type"
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#endif
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return ReturnCode::OK;
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}
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@@ -70,12 +75,24 @@ ReturnCode LowPower::sleep()
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ReturnCode LowPower::stop()
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{
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#if defined(STM32L0XX)
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SET(PWR->CR, PWR_CR_CWUF); // clear wakeup flag
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while(PWR->CSR & PWR_CSR_WUF) {};
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CLR(PWR->CR, PWR_CR_PDDS); // Enter stop mode when the CPU enters deepsleep
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CLR(RCC->CFGR, RCC_CFGR_STOPWUCK); // MSI oscillator is wake-up from stop clock
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SET(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); // low-power mode = stop mode
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#elif defined(STM32L4XX)
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SET(PWR->SCR, PWR_SCR_CWUF1); // clear wakeup flag
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while(PWR->SR1 & PWR_SR1_WUF1) {};
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SET_TO(PWR->CR1, PWR_CR1_LPMS, 1 << PWR_CR1_LPMS_Pos); // Enter stop mode 1 when the CPU enters deepsleep
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CLR(RCC->CFGR, RCC_CFGR_STOPWUCK); // MSI oscillator is wake-up from stop clock
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SET(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); // low-power mode = stop mode
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#else
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#error "Unsupported device type"
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#endif
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__WFI(); // enter low-power mode (Wake from interrupt)
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wakeups++;
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@@ -34,9 +34,15 @@ LptimPwm::LptimPwm(LPTIM_TypeDef *lptim)
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void LptimPwm::init_lptim()
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{
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/* Enable LPTIM in APB1 */
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#if defined(STM32L0XX)
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SET(RCC->APB1ENR,
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RCC_APB1ENR_LPTIM1EN);
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#elif defined(STM32L4XX)
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SET(RCC->APB1ENR1,
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RCC_APB1ENR1_LPTIM1EN);
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#else
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#error "Unsupported family"
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#endif
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// Enable low-speed internal
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RCC->CSR |= RCC_CSR_LSION;
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while (!(RCC->CSR & RCC_CSR_LSIRDY)) {};
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@@ -90,21 +96,6 @@ ReturnCode LptimPwm::init()
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{
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init_lptim();
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/* Enable GPIO port A */
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SET(RCC->IOPENR, RCC_IOPENR_IOPAEN);
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/* Assign LPTIM1_OUT to PA7 */
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SET_TO(GPIOA->AFR[0],
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GPIO_AFRL_AFRL7,
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1u << GPIO_AFRL_AFRL7_Pos);
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SET_TO(GPIOA->MODER,
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GPIO_MODER_MODE7,
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2u << GPIO_MODER_MODE7_Pos);
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CLR(GPIOA->OTYPER, GPIO_OTYPER_OT_7);
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CLR(GPIOA->PUPDR, GPIO_PUPDR_PUPD7);
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return ReturnCode::OK;
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}
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@@ -22,7 +22,7 @@
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#pragma once
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#include "Bsp/ReturnCode.h"
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#include "stm32l0xx.h"
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#include "Mcu.h"
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namespace BSP {
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@@ -58,19 +58,27 @@ void RtcDriver::enable_periodic_alarm()
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// Only calculate alarms when second rolls over
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SET_TO(RTC->ALRMASSR, RTC_ALRMASSR_MASKSS, RTC_ALRMASSR_MASKSS);
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#if defined(STM32L0XX)
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SET(RTC->CR, RTC_CR_ALRAE | RTC_CR_ALRAIE);
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SET(EXTI->IMR, EXTI_IMR_IM17);
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SET(EXTI->EMR, EXTI_EMR_EM17);
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SET(EXTI->RTSR, EXTI_RTSR_RT17);
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#elif defined(STM32L4XX)
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SET(RTC->CR, RTC_CR_ALRAE | RTC_CR_ALRAIE);
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SET(EXTI->IMR1, EXTI_IMR1_IM18);
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SET(EXTI->EMR1, EXTI_EMR1_EM18);
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SET(EXTI->RTSR1, EXTI_RTSR1_RT18);
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#else
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#error "Unsupported family"
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#endif
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}
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ReturnCode RtcDriver::init_hw()
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{
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//SET(RCC->CSR, RCC_CSR_RTCRST);
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#if defined(STM32L0XX)
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uint32_t temp = RCC->CSR;
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SET(RCC->CSR, RCC_CSR_RTCRST);
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SET(RCC->APB1ENR, RCC_APB1ENR_PWREN);
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SET(PWR->CR, PWR_CR_DBP);
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@@ -91,6 +99,32 @@ ReturnCode RtcDriver::init_hw()
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RTC->ISR = RTC_ISR_INIT;
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while (!(RTC->ISR & RTC_ISR_INITF)) {}
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#elif defined(STM32L4XX)
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uint32_t temp = RCC->CSR;
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SET(RCC->APB1ENR1, RCC_APB1ENR1_PWREN);
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SET(PWR->CR1, PWR_CR1_DBP);
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/*<! Set RTC input clock to the LSE (low-speed external 32.768kHz) clock */
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if (!(RCC->BDCR & RCC_BDCR_LSERDY)) {
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// TODO: Does this help?
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SET(temp, RCC_BDCR_LSEON);
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}
|
||||
|
||||
SET_TO(temp, RCC_BDCR_RTCSEL, RCC_BDCR_RTCSEL_0);
|
||||
SET(temp, RCC_BDCR_RTCEN);
|
||||
RCC->BDCR = temp;
|
||||
|
||||
while (!(RCC->BDCR & RCC_BDCR_LSERDY)) {}
|
||||
|
||||
enable_rtc_write();
|
||||
|
||||
RTC->ICSR = RTC_ICSR_INIT;
|
||||
while (!(RTC->ICSR & RTC_ICSR_INITF)) {}
|
||||
|
||||
#else
|
||||
#error "Unsupported device type"
|
||||
#endif
|
||||
/*<! Set the Clock Prescalers (32.768kHz / 1 / 32768 = 1Hz */
|
||||
/*<! Set the Async prescaler to the Maximum (divide the clock by 128) */
|
||||
// XXX reset to 0, this is to enable easier debugging
|
||||
@@ -113,6 +147,7 @@ ReturnCode RtcDriver::init_hw()
|
||||
SET_TO(time, RTC_TR_SU, 6 << RTC_TR_SU_Pos);
|
||||
RTC->TR = time;
|
||||
|
||||
#if defined(STM32L0XX)
|
||||
CLR(RTC->ISR, RTC_ISR_INIT);
|
||||
|
||||
SET(EXTI->IMR, EXTI_IMR_IM20);
|
||||
@@ -124,6 +159,22 @@ ReturnCode RtcDriver::init_hw()
|
||||
NVIC_EnableIRQ(RTC_IRQn);
|
||||
NVIC_SetPriority(RTC_IRQn, 0);
|
||||
|
||||
#elif defined(STM32L4XX)
|
||||
CLR(RTC->ICSR, RTC_ICSR_INIT);
|
||||
|
||||
SET(EXTI->IMR1, EXTI_IMR1_IM20);
|
||||
SET(EXTI->EMR1, EXTI_EMR1_EM20);
|
||||
SET(EXTI->RTSR1, EXTI_RTSR1_RT20);
|
||||
|
||||
// Enable Wakeup irq, we may/will use them later
|
||||
SET(RTC->CR, RTC_CR_WUTIE);
|
||||
NVIC_EnableIRQ(RTC_WKUP_IRQn);
|
||||
NVIC_SetPriority(RTC_WKUP_IRQn, 0);
|
||||
|
||||
|
||||
#else
|
||||
#error "Unsupported device type"
|
||||
#endif
|
||||
enable_periodic_alarm();
|
||||
|
||||
disable_rtc_write();
|
||||
@@ -164,8 +215,16 @@ ReturnCode RtcDriver::set_time(const BSP::WallClockTime &wall_time)
|
||||
{
|
||||
enable_rtc_write();
|
||||
|
||||
#if defined(STM32L0XX)
|
||||
RTC->ISR = RTC_ISR_INIT;
|
||||
while (!(RTC->ISR & RTC_ISR_INITF)) {}
|
||||
#elif defined(STM32L4XX)
|
||||
RTC->ICSR = RTC_ICSR_INIT;
|
||||
while (!(RTC->ICSR & RTC_ICSR_INITF)) {}
|
||||
#else
|
||||
#error "Unsupported device type"
|
||||
#endif
|
||||
|
||||
|
||||
/*<! Load initial date and time */
|
||||
|
||||
@@ -182,9 +241,17 @@ ReturnCode RtcDriver::set_time(const BSP::WallClockTime &wall_time)
|
||||
SET_TO(time, RTC_TR_SU, wall_time.get_seconds_ones() << RTC_TR_SU_Pos);
|
||||
RTC->TR = time;
|
||||
|
||||
#if defined(STM32L0XX)
|
||||
CLR(RTC->ISR, RTC_ISR_INIT);
|
||||
while ((RTC->ISR & RTC_ISR_INITF)) {}
|
||||
while (!(RTC->ISR & RTC_ISR_RSF)) {}
|
||||
#elif defined(STM32L4XX)
|
||||
CLR(RTC->ICSR, RTC_ICSR_INIT);
|
||||
while ((RTC->ICSR & RTC_ICSR_INITF)) {}
|
||||
while (!(RTC->ICSR & RTC_ICSR_RSF)) {}
|
||||
#else
|
||||
#error "Unsupported device type"
|
||||
#endif
|
||||
|
||||
disable_rtc_write();
|
||||
|
||||
@@ -204,7 +271,15 @@ ReturnCode RtcDriver::set_wakeup_in(BSP::time_t wakeup_delay)
|
||||
/*<! If there is an ongoing wakeup, disable it */
|
||||
if (RTC->CR & RTC_CR_WUTE) {
|
||||
CLR(RTC->CR, RTC_CR_WUTE);
|
||||
|
||||
#if defined(STM32L0XX)
|
||||
while (!(RTC->ISR & RTC_ISR_WUTWF)) {}
|
||||
#elif defined(STM32L4XX)
|
||||
while (!(RTC->ICSR & RTC_ICSR_WUTWF)) {}
|
||||
#else
|
||||
#error "Unsupported device type"
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
uint32_t wucksel = 0;
|
||||
@@ -278,7 +353,9 @@ static uint32_t wakeup_alarms = 0;
|
||||
|
||||
extern "C" void RTC_IRQHandler()
|
||||
{
|
||||
|
||||
// Clear the wakeup and alarm irq in the EXTI
|
||||
#if defined(STM32L0XX)
|
||||
SET(EXTI->PR, EXTI_PR_PIF20 | EXTI_PR_PIF17);
|
||||
|
||||
if (RTC->ISR & RTC_ISR_ALRAF) {
|
||||
@@ -295,6 +372,28 @@ extern "C" void RTC_IRQHandler()
|
||||
CLR(RTC->CR, RTC_CR_WUTE);
|
||||
}
|
||||
|
||||
#elif defined(STM32L4XX)
|
||||
SET(EXTI->PR1, EXTI_PR1_PIF20 | EXTI_PR1_PIF18);
|
||||
|
||||
if (RTC->SR & RTC_SR_ALRAF) {
|
||||
RtcDriver::increment_seconds();
|
||||
CLR(RTC->SR, RTC_SR_ALRAF);
|
||||
}
|
||||
|
||||
if (RTC->SR & RTC_SR_WUTF) {
|
||||
wakeup_alarms++;
|
||||
// Clear the interrupt in the RTC
|
||||
SET(RTC->SCR, RTC_SCR_CWUTF);
|
||||
// Disable the Wakeup timer (its periodic, but we use it as a
|
||||
// one-shot timer
|
||||
CLR(RTC->CR, RTC_CR_WUTE);
|
||||
}
|
||||
|
||||
#else
|
||||
#error "Unsupported device type"
|
||||
#endif
|
||||
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
@@ -27,7 +27,7 @@
|
||||
#include "Bsp/ReturnCode.h"
|
||||
#include "Bsp/Time.h"
|
||||
|
||||
#include "stm32l0xx.h"
|
||||
#include "Mcu.h"
|
||||
|
||||
namespace BSP {
|
||||
|
||||
|
||||
@@ -27,51 +27,19 @@ namespace BSP {
|
||||
using RC = BSP::ReturnCode;
|
||||
using BSP::Schedule::TaskScheduler;
|
||||
using BSP::Schedule::NextTime;
|
||||
using BSP::GpioPin;
|
||||
using BSP::Time;
|
||||
|
||||
SpiDriver::SpiDriver(TaskScheduler &scheduler)
|
||||
SpiDriver::SpiDriver(TaskScheduler &scheduler, GpioPin &nss)
|
||||
: m_scheduler(scheduler)
|
||||
, m_spi(SPI1)
|
||||
, m_nss(nss)
|
||||
{}
|
||||
|
||||
void SpiDriver::init()
|
||||
{
|
||||
SET(RCC->IOPENR, RCC_IOPENR_IOPAEN);
|
||||
SET(RCC->IOPENR, RCC_IOPENR_IOPBEN);
|
||||
RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
|
||||
|
||||
/* Assign SPI_MOSI to PB1, since PA7 is taken by LPTIM_OUT */
|
||||
GPIOB->AFR[0] &= ~GPIO_AFRH_AFRH1;
|
||||
GPIOB->AFR[0] |= 1u << GPIO_AFRH_AFRH1_Pos;
|
||||
|
||||
SET_TO(GPIOB->MODER, GPIO_MODER_MODE1, 2u << GPIO_MODER_MODE1_Pos);
|
||||
|
||||
GPIOB->OTYPER &= ~GPIO_OTYPER_OT_1;
|
||||
GPIOB->PUPDR &= ~GPIO_PUPDR_PUPD12;
|
||||
|
||||
// SPI1 NSS (PA4)
|
||||
|
||||
SET_TO(GPIOA->MODER, GPIO_MODER_MODE4, 1u << GPIO_MODER_MODE4_Pos);
|
||||
|
||||
GPIOA->OTYPER &= ~GPIO_OTYPER_OT_4;
|
||||
GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD4;
|
||||
|
||||
// SPI1 SCK (PA5)
|
||||
GPIOA->AFR[0] &= ~GPIO_AFRL_AFRL5;
|
||||
|
||||
SET_TO(GPIOA->MODER, GPIO_MODER_MODE5, 2u << GPIO_MODER_MODE5_Pos);
|
||||
|
||||
GPIOA->OTYPER &= ~GPIO_OTYPER_OT_5;
|
||||
GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD5;
|
||||
|
||||
// SPI1 MISO (PA6)
|
||||
GPIOA->AFR[0] &= ~GPIO_AFRL_AFRL6;
|
||||
|
||||
SET_TO(GPIOA->MODER, GPIO_MODER_MODE6, 2u << GPIO_MODER_MODE6_Pos);
|
||||
|
||||
GPIOA->OTYPER &= ~GPIO_OTYPER_OT_6;
|
||||
GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD6;
|
||||
|
||||
// Enable Master mode and half the baud rate, so it's set to ~1MHz
|
||||
m_spi->CR1 |= SPI_CR1_MSTR | SPI_CR1_LSBFIRST | SPI_CR1_SSM;
|
||||
//m_spi->CR1 |= 1u << SPI_CR1_BR_Pos;
|
||||
@@ -91,17 +59,14 @@ RC SpiDriver::tx_blocking(const uint8_t *data, size_t len)
|
||||
|
||||
m_spi->CR1 |= SPI_CR1_SPE;
|
||||
|
||||
//FLIP(GPIOB->ODR, GPIO_ODR_OD3);
|
||||
CLR(m_spi->CR1, SPI_CR1_SSI);
|
||||
SET(GPIOA->ODR, GPIO_ODR_OD4);
|
||||
m_nss.write(1);
|
||||
|
||||
for (size_t i = 0; i < len; i++) {
|
||||
while (!(m_spi->SR & SPI_SR_TXE)) {}
|
||||
m_spi->DR = data[i];
|
||||
}
|
||||
|
||||
//FLIP(GPIOB->ODR, GPIO_ODR_OD3);
|
||||
|
||||
while (!(m_spi->SR & SPI_SR_TXE)) {}
|
||||
|
||||
// Ensure that NSS is held for long enough to meet the display's thSCS
|
||||
@@ -109,6 +74,7 @@ RC SpiDriver::tx_blocking(const uint8_t *data, size_t len)
|
||||
|
||||
m_spi->CR1 &= ~SPI_CR1_SPE;
|
||||
SET(m_spi->CR1, SPI_CR1_SSI);
|
||||
m_nss.write(0);
|
||||
CLR(GPIOA->ODR, GPIO_ODR_OD4);
|
||||
|
||||
return RC::OK;
|
||||
|
||||
@@ -23,17 +23,19 @@
|
||||
|
||||
#include "Bsp/ReturnCode.h"
|
||||
#include "Bsp/TaskScheduler.h"
|
||||
#include "Bsp/Drivers/GpioDriver.h"
|
||||
|
||||
// TODO: Find a better include for this
|
||||
#include "stm32l0xx.h"
|
||||
#include "Mcu.h"
|
||||
|
||||
namespace BSP {
|
||||
|
||||
class SpiDriver : public BSP::Schedule::Task {
|
||||
|
||||
public:
|
||||
// TODO: Add configurability / provide a real abstraction
|
||||
SpiDriver(BSP::Schedule::TaskScheduler &scheduler);
|
||||
// TODO: Allow other CS pins of either polaritu
|
||||
// TODO: Allow configurable CPHA, CPOL
|
||||
// TODO: Allow other SPI instances (not just SPI1)
|
||||
SpiDriver(BSP::Schedule::TaskScheduler &scheduler, BSP::GpioPin &nss);
|
||||
|
||||
void init();
|
||||
BSP::Schedule::NextTime execute() override;
|
||||
@@ -42,6 +44,7 @@ public:
|
||||
private:
|
||||
BSP::Schedule::TaskScheduler &m_scheduler;
|
||||
SPI_TypeDef *m_spi;
|
||||
BSP::GpioPin &m_nss;
|
||||
};
|
||||
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user