Add Makefile support for more output binaries, add clock test
This commit is contained in:
@@ -58,27 +58,35 @@ void RtcDriver::enable_periodic_alarm()
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// Only calculate alarms when second rolls over
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SET_TO(RTC->ALRMASSR, RTC_ALRMASSR_MASKSS, RTC_ALRMASSR_MASKSS);
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CLR(RTC->CR, RTC_CR_ALRAE | RTC_CR_ALRAIE);
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#if defined(STM32L0XX)
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SET(RTC->CR, RTC_CR_ALRAE | RTC_CR_ALRAIE);
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SET(EXTI->IMR, EXTI_IMR_IM17);
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SET(EXTI->EMR, EXTI_EMR_EM17);
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SET(EXTI->RTSR, EXTI_RTSR_RT17);
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#elif defined(STM32L4XX)
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SET(RTC->CR, RTC_CR_ALRAE | RTC_CR_ALRAIE);
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SET(EXTI->IMR1, EXTI_IMR1_IM18);
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SET(EXTI->EMR1, EXTI_EMR1_EM18);
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SET(EXTI->RTSR1, EXTI_RTSR1_RT18);
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NVIC_EnableIRQ(RTC_Alarm_IRQn);
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NVIC_SetPriority(RTC_Alarm_IRQn, 0);
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SET(RTC->SCR, RTC_SCR_CALRAF);
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#else
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#error "Unsupported family"
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#endif
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SET(RTC->CR, RTC_CR_ALRAE);
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SET(RTC->CR, RTC_CR_ALRAIE);
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}
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ReturnCode RtcDriver::init_hw()
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{
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//SET(RCC->CSR, RCC_CSR_RTCRST);
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#if defined(STM32L0XX)
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uint32_t temp = RCC->CSR;
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SET(RCC->CSR, RCC_CSR_RTCRST);
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SET(RCC->APB1ENR, RCC_APB1ENR_PWREN);
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SET(PWR->CR, PWR_CR_DBP);
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@@ -102,14 +110,14 @@ ReturnCode RtcDriver::init_hw()
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#elif defined(STM32L4XX)
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uint32_t temp = RCC->CSR;
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//SET(RCC->CSR, RCC_CSR_RTCRST);
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SET(RCC->APB1ENR1, RCC_APB1ENR1_PWREN);
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SET(PWR->CR1, PWR_CR1_DBP);
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/*<! Set RTC input clock to the LSE (low-speed external 32.768kHz) clock */
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if (!(RCC->BDCR & RCC_BDCR_LSERDY)) {
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// TODO: Does this help?
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SET(temp, RCC_BDCR_LSEON);
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}
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SET(temp, RCC_BDCR_LSEON);
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while (!(RCC->BDCR & RCC_BDCR_LSERDY)) {}
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SET_TO(temp, RCC_BDCR_RTCSEL, RCC_BDCR_RTCSEL_0);
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SET(temp, RCC_BDCR_RTCEN);
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@@ -127,8 +135,7 @@ ReturnCode RtcDriver::init_hw()
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#endif
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/*<! Set the Clock Prescalers (32.768kHz / 1 / 32768 = 1Hz */
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/*<! Set the Async prescaler to the Maximum (divide the clock by 128) */
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// XXX reset to 0, this is to enable easier debugging
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SET_TO(RTC->PRER, RTC_PRER_PREDIV_A, 0);
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SET_TO(RTC->PRER, RTC_PRER_PREDIV_A, 0);
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/*<! Set the Syncronous scaler so the RTC updates at 1Hz */
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SET_TO(RTC->PRER, RTC_PRER_PREDIV_S, (LSE_CLOCK_FREQ - 1));
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@@ -151,27 +158,22 @@ ReturnCode RtcDriver::init_hw()
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CLR(RTC->ISR, RTC_ISR_INIT);
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SET(EXTI->IMR, EXTI_IMR_IM20);
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SET(EXTI->EMR, EXTI_EMR_EM20);
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SET(EXTI->RTSR, EXTI_RTSR_RT20);
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// Enable Wakeup irq, we may/will use them later
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SET(RTC->CR, RTC_CR_WUTIE);
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NVIC_EnableIRQ(RTC_IRQn);
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NVIC_SetPriority(RTC_IRQn, 0);
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#elif defined(STM32L4XX)
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CLR(RTC->ICSR, RTC_ICSR_INIT);
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SET(EXTI->IMR1, EXTI_IMR1_IM20);
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SET(EXTI->EMR1, EXTI_EMR1_EM20);
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SET(EXTI->RTSR1, EXTI_RTSR1_RT20);
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// Enable Wakeup irq, we may/will use them later
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SET(RTC->CR, RTC_CR_WUTIE);
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NVIC_EnableIRQ(RTC_WKUP_IRQn);
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NVIC_SetPriority(RTC_WKUP_IRQn, 0);
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NVIC_SetPriority(RTC_WKUP_IRQn, 1);
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#else
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#error "Unsupported device type"
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#endif
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@@ -179,6 +181,8 @@ ReturnCode RtcDriver::init_hw()
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disable_rtc_write();
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//SET(EXTI->SWIER1, EXTI_SWIER1_SWI18);
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return ReturnCode::OK;
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}
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@@ -243,11 +247,11 @@ ReturnCode RtcDriver::set_time(const BSP::WallClockTime &wall_time)
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#if defined(STM32L0XX)
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CLR(RTC->ISR, RTC_ISR_INIT);
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while ((RTC->ISR & RTC_ISR_INITF)) {}
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while (!(RTC->ISR & RTC_ISR_INITF)) {}
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while (!(RTC->ISR & RTC_ISR_RSF)) {}
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#elif defined(STM32L4XX)
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CLR(RTC->ICSR, RTC_ICSR_INIT);
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while ((RTC->ICSR & RTC_ICSR_INITF)) {}
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while (!(RTC->ICSR & RTC_ICSR_INITF)) {}
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while (!(RTC->ICSR & RTC_ICSR_RSF)) {}
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#else
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#error "Unsupported device type"
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@@ -319,22 +323,22 @@ ReturnCode RtcDriver::set_wakeup_in(BSP::time_t wakeup_delay)
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return ReturnCode::OK;
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}
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BSP::time_t RtcDriver::RtcSystemTimer::get_time()
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{
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uint32_t new_secs, old_secs, ssr;
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uint64_t new_timer_ticks, new_millis;
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do {
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__disable_irq();
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old_secs = m_seconds;
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ssr = RTC->SSR & 0xFFFF;
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new_secs = m_seconds;
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__enable_irq();
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} while (new_secs != old_secs);
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BSP::time_t RtcDriver::RtcSystemTimer::get_time()
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{
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uint32_t new_secs, old_secs, ssr;
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uint64_t new_timer_ticks, new_millis;
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do {
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__disable_irq();
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old_secs = m_seconds;
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ssr = RTC->SSR & 0xFFFF;
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new_secs = m_seconds;
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__enable_irq();
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} while (new_secs != old_secs);
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new_timer_ticks = (uint64_t) new_secs * LSE_CLOCK_FREQ;
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/** SSR is a countdown register */
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new_millis = (new_timer_ticks + LSE_CLOCK_FREQ - 1 - ssr) * BSP::Time::MILLIS_PER_SEC / LSE_CLOCK_FREQ;
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return BSP::Time::millis(new_millis);
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new_timer_ticks = (uint64_t) new_secs * LSE_CLOCK_FREQ;
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/** SSR is a countdown register */
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new_millis = (new_timer_ticks + LSE_CLOCK_FREQ - 1 - ssr) * BSP::Time::MILLIS_PER_SEC / LSE_CLOCK_FREQ;
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return BSP::Time::millis(new_millis);
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}
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void RtcDriver::RtcSystemTimer::increment_seconds()
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@@ -351,11 +355,10 @@ void RtcDriver::increment_seconds()
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static uint32_t wakeup_alarms = 0;
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#if defined(STM32L0XX)
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extern "C" void RTC_IRQHandler()
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{
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// Clear the wakeup and alarm irq in the EXTI
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#if defined(STM32L0XX)
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SET(EXTI->PR, EXTI_PR_PIF20 | EXTI_PR_PIF17);
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if (RTC->ISR & RTC_ISR_ALRAF) {
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@@ -371,29 +374,30 @@ extern "C" void RTC_IRQHandler()
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// one-shot timer
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CLR(RTC->CR, RTC_CR_WUTE);
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}
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}
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}
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#elif defined(STM32L4XX)
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SET(EXTI->PR1, EXTI_PR1_PIF20 | EXTI_PR1_PIF18);
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extern "C" void RTC_WKUP_IRQHandler()
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{
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SET(EXTI->PR1, EXTI_PR1_PIF20);
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if (RTC->SR & RTC_SR_ALRAF) {
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RtcDriver::increment_seconds();
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CLR(RTC->SR, RTC_SR_ALRAF);
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}
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wakeup_alarms++;
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// Clear the interrupt in the RTC
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SET(RTC->SCR, RTC_SCR_CWUTF);
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// Disable the Wakeup timer (its periodic, but we use it as a
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// one-shot timer
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CLR(RTC->CR, RTC_CR_WUTE);
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}
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if (RTC->SR & RTC_SR_WUTF) {
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wakeup_alarms++;
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// Clear the interrupt in the RTC
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SET(RTC->SCR, RTC_SCR_CWUTF);
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// Disable the Wakeup timer (its periodic, but we use it as a
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// one-shot timer
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CLR(RTC->CR, RTC_CR_WUTE);
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}
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extern "C" void RTC_ALARM_IRQHandler()
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{
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SET(EXTI->PR1, EXTI_PR1_PIF18);
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RtcDriver::increment_seconds();
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SET(RTC->SCR, RTC_SCR_CALRAF);
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}
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}
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#else
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#error "Unsupported device type"
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#endif
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}
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}
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@@ -259,6 +259,8 @@ Reset_Handler:
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bl SystemInit
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#endif
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bl __init_array
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#ifndef __START
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#define __START _start
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#endif
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@@ -259,6 +259,8 @@ Reset_Handler:
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bl SystemInit
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#endif
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bl __init_array
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#ifndef __START
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#define __START _start
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#endif
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