Add Makefile support for more output binaries, add clock test

This commit is contained in:
2020-04-18 12:18:32 -07:00
parent ef23f1d03a
commit acba841bf1
6 changed files with 195 additions and 262 deletions

View File

@@ -58,27 +58,35 @@ void RtcDriver::enable_periodic_alarm()
// Only calculate alarms when second rolls over
SET_TO(RTC->ALRMASSR, RTC_ALRMASSR_MASKSS, RTC_ALRMASSR_MASKSS);
CLR(RTC->CR, RTC_CR_ALRAE | RTC_CR_ALRAIE);
#if defined(STM32L0XX)
SET(RTC->CR, RTC_CR_ALRAE | RTC_CR_ALRAIE);
SET(EXTI->IMR, EXTI_IMR_IM17);
SET(EXTI->EMR, EXTI_EMR_EM17);
SET(EXTI->RTSR, EXTI_RTSR_RT17);
#elif defined(STM32L4XX)
SET(RTC->CR, RTC_CR_ALRAE | RTC_CR_ALRAIE);
SET(EXTI->IMR1, EXTI_IMR1_IM18);
SET(EXTI->EMR1, EXTI_EMR1_EM18);
SET(EXTI->RTSR1, EXTI_RTSR1_RT18);
NVIC_EnableIRQ(RTC_Alarm_IRQn);
NVIC_SetPriority(RTC_Alarm_IRQn, 0);
SET(RTC->SCR, RTC_SCR_CALRAF);
#else
#error "Unsupported family"
#endif
SET(RTC->CR, RTC_CR_ALRAE);
SET(RTC->CR, RTC_CR_ALRAIE);
}
ReturnCode RtcDriver::init_hw()
{
//SET(RCC->CSR, RCC_CSR_RTCRST);
#if defined(STM32L0XX)
uint32_t temp = RCC->CSR;
SET(RCC->CSR, RCC_CSR_RTCRST);
SET(RCC->APB1ENR, RCC_APB1ENR_PWREN);
SET(PWR->CR, PWR_CR_DBP);
@@ -102,14 +110,14 @@ ReturnCode RtcDriver::init_hw()
#elif defined(STM32L4XX)
uint32_t temp = RCC->CSR;
//SET(RCC->CSR, RCC_CSR_RTCRST);
SET(RCC->APB1ENR1, RCC_APB1ENR1_PWREN);
SET(PWR->CR1, PWR_CR1_DBP);
/*<! Set RTC input clock to the LSE (low-speed external 32.768kHz) clock */
if (!(RCC->BDCR & RCC_BDCR_LSERDY)) {
// TODO: Does this help?
SET(temp, RCC_BDCR_LSEON);
}
SET(temp, RCC_BDCR_LSEON);
while (!(RCC->BDCR & RCC_BDCR_LSERDY)) {}
SET_TO(temp, RCC_BDCR_RTCSEL, RCC_BDCR_RTCSEL_0);
SET(temp, RCC_BDCR_RTCEN);
@@ -127,8 +135,7 @@ ReturnCode RtcDriver::init_hw()
#endif
/*<! Set the Clock Prescalers (32.768kHz / 1 / 32768 = 1Hz */
/*<! Set the Async prescaler to the Maximum (divide the clock by 128) */
// XXX reset to 0, this is to enable easier debugging
SET_TO(RTC->PRER, RTC_PRER_PREDIV_A, 0);
SET_TO(RTC->PRER, RTC_PRER_PREDIV_A, 0);
/*<! Set the Syncronous scaler so the RTC updates at 1Hz */
SET_TO(RTC->PRER, RTC_PRER_PREDIV_S, (LSE_CLOCK_FREQ - 1));
@@ -151,27 +158,22 @@ ReturnCode RtcDriver::init_hw()
CLR(RTC->ISR, RTC_ISR_INIT);
SET(EXTI->IMR, EXTI_IMR_IM20);
SET(EXTI->EMR, EXTI_EMR_EM20);
SET(EXTI->RTSR, EXTI_RTSR_RT20);
// Enable Wakeup irq, we may/will use them later
SET(RTC->CR, RTC_CR_WUTIE);
NVIC_EnableIRQ(RTC_IRQn);
NVIC_SetPriority(RTC_IRQn, 0);
#elif defined(STM32L4XX)
CLR(RTC->ICSR, RTC_ICSR_INIT);
SET(EXTI->IMR1, EXTI_IMR1_IM20);
SET(EXTI->EMR1, EXTI_EMR1_EM20);
SET(EXTI->RTSR1, EXTI_RTSR1_RT20);
// Enable Wakeup irq, we may/will use them later
SET(RTC->CR, RTC_CR_WUTIE);
NVIC_EnableIRQ(RTC_WKUP_IRQn);
NVIC_SetPriority(RTC_WKUP_IRQn, 0);
NVIC_SetPriority(RTC_WKUP_IRQn, 1);
#else
#error "Unsupported device type"
#endif
@@ -179,6 +181,8 @@ ReturnCode RtcDriver::init_hw()
disable_rtc_write();
//SET(EXTI->SWIER1, EXTI_SWIER1_SWI18);
return ReturnCode::OK;
}
@@ -243,11 +247,11 @@ ReturnCode RtcDriver::set_time(const BSP::WallClockTime &wall_time)
#if defined(STM32L0XX)
CLR(RTC->ISR, RTC_ISR_INIT);
while ((RTC->ISR & RTC_ISR_INITF)) {}
while (!(RTC->ISR & RTC_ISR_INITF)) {}
while (!(RTC->ISR & RTC_ISR_RSF)) {}
#elif defined(STM32L4XX)
CLR(RTC->ICSR, RTC_ICSR_INIT);
while ((RTC->ICSR & RTC_ICSR_INITF)) {}
while (!(RTC->ICSR & RTC_ICSR_INITF)) {}
while (!(RTC->ICSR & RTC_ICSR_RSF)) {}
#else
#error "Unsupported device type"
@@ -319,22 +323,22 @@ ReturnCode RtcDriver::set_wakeup_in(BSP::time_t wakeup_delay)
return ReturnCode::OK;
}
BSP::time_t RtcDriver::RtcSystemTimer::get_time()
{
uint32_t new_secs, old_secs, ssr;
uint64_t new_timer_ticks, new_millis;
do {
__disable_irq();
old_secs = m_seconds;
ssr = RTC->SSR & 0xFFFF;
new_secs = m_seconds;
__enable_irq();
} while (new_secs != old_secs);
BSP::time_t RtcDriver::RtcSystemTimer::get_time()
{
uint32_t new_secs, old_secs, ssr;
uint64_t new_timer_ticks, new_millis;
do {
__disable_irq();
old_secs = m_seconds;
ssr = RTC->SSR & 0xFFFF;
new_secs = m_seconds;
__enable_irq();
} while (new_secs != old_secs);
new_timer_ticks = (uint64_t) new_secs * LSE_CLOCK_FREQ;
/** SSR is a countdown register */
new_millis = (new_timer_ticks + LSE_CLOCK_FREQ - 1 - ssr) * BSP::Time::MILLIS_PER_SEC / LSE_CLOCK_FREQ;
return BSP::Time::millis(new_millis);
new_timer_ticks = (uint64_t) new_secs * LSE_CLOCK_FREQ;
/** SSR is a countdown register */
new_millis = (new_timer_ticks + LSE_CLOCK_FREQ - 1 - ssr) * BSP::Time::MILLIS_PER_SEC / LSE_CLOCK_FREQ;
return BSP::Time::millis(new_millis);
}
void RtcDriver::RtcSystemTimer::increment_seconds()
@@ -351,11 +355,10 @@ void RtcDriver::increment_seconds()
static uint32_t wakeup_alarms = 0;
#if defined(STM32L0XX)
extern "C" void RTC_IRQHandler()
{
// Clear the wakeup and alarm irq in the EXTI
#if defined(STM32L0XX)
SET(EXTI->PR, EXTI_PR_PIF20 | EXTI_PR_PIF17);
if (RTC->ISR & RTC_ISR_ALRAF) {
@@ -371,29 +374,30 @@ extern "C" void RTC_IRQHandler()
// one-shot timer
CLR(RTC->CR, RTC_CR_WUTE);
}
}
}
#elif defined(STM32L4XX)
SET(EXTI->PR1, EXTI_PR1_PIF20 | EXTI_PR1_PIF18);
extern "C" void RTC_WKUP_IRQHandler()
{
SET(EXTI->PR1, EXTI_PR1_PIF20);
if (RTC->SR & RTC_SR_ALRAF) {
RtcDriver::increment_seconds();
CLR(RTC->SR, RTC_SR_ALRAF);
}
wakeup_alarms++;
// Clear the interrupt in the RTC
SET(RTC->SCR, RTC_SCR_CWUTF);
// Disable the Wakeup timer (its periodic, but we use it as a
// one-shot timer
CLR(RTC->CR, RTC_CR_WUTE);
}
if (RTC->SR & RTC_SR_WUTF) {
wakeup_alarms++;
// Clear the interrupt in the RTC
SET(RTC->SCR, RTC_SCR_CWUTF);
// Disable the Wakeup timer (its periodic, but we use it as a
// one-shot timer
CLR(RTC->CR, RTC_CR_WUTE);
}
extern "C" void RTC_ALARM_IRQHandler()
{
SET(EXTI->PR1, EXTI_PR1_PIF18);
RtcDriver::increment_seconds();
SET(RTC->SCR, RTC_SCR_CALRAF);
}
}
#else
#error "Unsupported device type"
#endif
}
}