refactor tree, add ecad, mcad
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@@ -26,8 +26,8 @@
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namespace BSP {
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using Common::ReturnCode;
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using Common::time_t;
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using BSP::ReturnCode;
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using BSP::time_t;
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RtcDriver::RtcSystemTimer RtcDriver::m_sys_timer;
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@@ -106,11 +106,11 @@ ReturnCode RtcDriver::init_hw()
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uint32_t time = 0;
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SET(time, RTC_TR_PM);
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SET_TO(time, RTC_TR_HT, 1 << RTC_TR_HT_Pos);
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SET_TO(time, RTC_TR_HU, 2 << RTC_TR_HU_Pos);
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SET_TO(time, RTC_TR_MNT, 5 << RTC_TR_MNT_Pos);
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SET_TO(time, RTC_TR_HU, 0 << RTC_TR_HU_Pos);
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SET_TO(time, RTC_TR_MNT, 0 << RTC_TR_MNT_Pos);
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SET_TO(time, RTC_TR_MNU, 9 << RTC_TR_MNU_Pos);
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SET_TO(time, RTC_TR_ST, 0 << RTC_TR_ST_Pos);
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SET_TO(time, RTC_TR_SU, 0 << RTC_TR_SU_Pos);
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SET_TO(time, RTC_TR_ST, 3 << RTC_TR_ST_Pos);
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SET_TO(time, RTC_TR_SU, 6 << RTC_TR_SU_Pos);
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RTC->TR = time;
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CLR(RTC->ISR, RTC_ISR_INIT);
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@@ -119,7 +119,7 @@ ReturnCode RtcDriver::init_hw()
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SET(EXTI->EMR, EXTI_EMR_EM20);
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SET(EXTI->RTSR, EXTI_RTSR_RT20);
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// Enable Wakeup interrupts, we may/will use them later
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// Enable Wakeup irq, we may/will use them later
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SET(RTC->CR, RTC_CR_WUTIE);
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NVIC_EnableIRQ(RTC_IRQn);
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NVIC_SetPriority(RTC_IRQn, 0);
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@@ -131,7 +131,7 @@ ReturnCode RtcDriver::init_hw()
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return ReturnCode::OK;
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}
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ReturnCode RtcDriver::get_time(Common::WallClockTime &wall_time)
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ReturnCode RtcDriver::get_time(BSP::WallClockTime &wall_time)
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{
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/*<! The value of TR in the shadow register is locked when SSR is
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read (by the system timer), until the date register is read. We're
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@@ -155,12 +155,12 @@ ReturnCode RtcDriver::get_time(Common::WallClockTime &wall_time)
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hours += 12;
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}
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new (&wall_time) Common::WallClockTime(hours, minutes, seconds);
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new (&wall_time) BSP::WallClockTime(hours, minutes, seconds);
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return ReturnCode::OK;
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}
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ReturnCode RtcDriver::set_time(const Common::WallClockTime &wall_time)
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ReturnCode RtcDriver::set_time(const BSP::WallClockTime &wall_time)
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{
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enable_rtc_write();
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@@ -191,13 +191,13 @@ ReturnCode RtcDriver::set_time(const Common::WallClockTime &wall_time)
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return ReturnCode::OK;
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}
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ReturnCode RtcDriver::set_wakeup_in(Common::time_t wakeup_delay)
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ReturnCode RtcDriver::set_wakeup_in(BSP::time_t wakeup_delay)
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{
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/*<! 2^64 / (1000000 * 32768) / 60 / 60 / 24 / 365 = ~17.85 This
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value will only overflow for wakeup_delays > 17.85 years, so
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this is fine. */
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uint64_t delay_cycles = Common::Time::to_micros(wakeup_delay) * LSE_CLOCK_FREQ /
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Common::Time::MICROS_PER_SEC;
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uint64_t delay_cycles = BSP::Time::to_micros(wakeup_delay) * LSE_CLOCK_FREQ /
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BSP::Time::MICROS_PER_SEC;
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enable_rtc_write();
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@@ -244,25 +244,29 @@ ReturnCode RtcDriver::set_wakeup_in(Common::time_t wakeup_delay)
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return ReturnCode::OK;
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}
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Common::time_t RtcDriver::RtcSystemTimer::get_time()
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BSP::time_t RtcDriver::RtcSystemTimer::get_time()
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{
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uint32_t new_secs, old_secs, ssr, subsecond;
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uint32_t new_secs, old_secs, ssr;
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uint64_t new_timer_ticks, new_millis;
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do {
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__disable_irq();
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old_secs = m_seconds;
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ssr = RTC->SSR & 0xFFFF;
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new_secs = m_seconds;
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__enable_irq();
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} while (new_secs != old_secs);
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new_secs = new_secs * LSE_CLOCK_FREQ;
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new_timer_ticks = (uint64_t) new_secs * LSE_CLOCK_FREQ;
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/** SSR is a countdown register */
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subsecond = (new_secs + LSE_CLOCK_FREQ - 1 - ssr) * Common::Time::MILLIS_PER_SEC / LSE_CLOCK_FREQ;
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return Common::Time::millis(subsecond);
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new_millis = (new_timer_ticks + LSE_CLOCK_FREQ - 1 - ssr) * BSP::Time::MILLIS_PER_SEC / LSE_CLOCK_FREQ;
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return BSP::Time::millis(new_millis);
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}
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void RtcDriver::RtcSystemTimer::increment_seconds()
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{
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/** TODO: Atomic increment */
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__disable_irq();
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m_seconds++;
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__enable_irq();
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}
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void RtcDriver::increment_seconds()
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@@ -274,7 +278,7 @@ static uint32_t wakeup_alarms = 0;
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extern "C" void RTC_IRQHandler()
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{
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// Clear the wakeup and alarm interrupts in the EXTI
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// Clear the wakeup and alarm irq in the EXTI
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SET(EXTI->PR, EXTI_PR_PIF20 | EXTI_PR_PIF17);
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if (RTC->ISR & RTC_ISR_ALRAF) {
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