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Update such that tests pass for v1.2

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This includes minor updates for the th different MCU variant, and bugfixes.

Resolves #7
This commit is contained in:
Max Regan
2020-06-03 04:51:19 +00:00
parent 0f0cb73fa5
commit cdf0f4ffc9
22 changed files with 649 additions and 57 deletions
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2
firmware/Bsp/Drivers/GpioDriver.cpp
View File

@@ -107,7 +107,7 @@ namespace BSP {
if (mode == output_mode_t::OPEN_DRAIN) {
SET(m_gpio->OTYPER, mask);
} else {
SET(m_gpio->OTYPER, mask);
CLR(m_gpio->OTYPER, mask);
}
}

6
firmware/Bsp/Drivers/LptimPwm.cpp
View File

@@ -50,7 +50,7 @@ void LptimPwm::init_lptim()
/*!< Set the LSE clock to be the source of the LPTIM */
SET_TO(RCC->CCIPR,
RCC_CCIPR_LPTIM1SEL,
RCC_CCIPR_LPTIM1SEL_0);
RCC_CCIPR_LPTIM1SEL_0 | RCC_CCIPR_LPTIM1SEL_1);
/** Write CR CFGR and IER while LPTIM is disabled (LPTIM_CR_ENABLE not yet set) */
/*!< Disable Interrupts (not needed, this is the default */
@@ -82,8 +82,8 @@ void LptimPwm::init_lptim()
/*!< Produce a 60Hz, signal with minimal "high" time. The display
only needs 2us of "high" time on EXTCOMM, and it draws a fair
amount of power. */
LPTIM1->ARR = 0x27F;
LPTIM1->CMP = 0x27E;
LPTIM1->ARR = (32768 / 50) + 1;
LPTIM1->CMP = (32768 / 50);
while(!(LPTIM1->ISR & LPTIM_ISR_ARROK)) {}
while(!(LPTIM1->ISR & LPTIM_ISR_CMPOK)) {}

6
firmware/Bsp/Drivers/RtcDriver.cpp
View File

@@ -253,11 +253,11 @@ ReturnCode RtcDriver::set_time(const BSP::WallClockTime &wall_time)
#if defined(STM32L0XX)
CLR(RTC->ISR, RTC_ISR_INIT);
while (!(RTC->ISR & RTC_ISR_INITF)) {} // FIXME: this is probably inverted
while (RTC->ISR & RTC_ISR_INITF) {}
while (!(RTC->ISR & RTC_ISR_RSF)) {}
#elif defined(STM32L4XX)
CLR(RTC->ICSR, RTC_ICSR_INIT);
while ((RTC->ICSR & RTC_ICSR_INITF)) {}
while (RTC->ICSR & RTC_ICSR_INITF) {}
while (!(RTC->ICSR & RTC_ICSR_RSF)) {}
#else
#error "Unsupported device type"
@@ -415,7 +415,9 @@ extern "C" void RTC_IRQHandler()
CLR(RTC->ISR, RTC_ISR_WUTF);
// Disable the Wakeup timer (its periodic, but we use it as a
// one-shot timer
RtcDriver::enable_rtc_write();
CLR(RTC->CR, RTC_CR_WUTE);
RtcDriver::disable_rtc_write();
}
}

5
firmware/Bsp/Drivers/RtcDriver.h
View File

@@ -52,11 +52,12 @@ public:
static void increment_wakeup_count();
static void increment_alarm_count();
static void enable_rtc_write();
static void disable_rtc_write();
private:
static BSP::ReturnCode init_hw();
static void enable_rtc_write();
static void disable_rtc_write();
static void enable_rtc_wakeup_interrupt();
static void enable_periodic_alarm();

13
firmware/Bsp/Drivers/UsartDriver.cpp
View File

@@ -36,8 +36,6 @@ UsartDriver::UsartDriver(USART_TypeDef *usart, TaskScheduler &scheduler)
void UsartDriver::init()
{
// TODO: This is all hardcoded for USART1 (doesn't exist on STM32L031)
#if defined(STM32L0XX)
if (m_usart == USART2) {
RCC->APB1ENR |= RCC_APB1ENR_USART2EN;
@@ -54,14 +52,9 @@ void UsartDriver::init()
#error "Unknown device family"
#endif
// Set TX (PA9) to output, push/pull
SET_TO(GPIOA->AFR[1], GPIO_AFRH_AFSEL9, 7u << GPIO_AFRH_AFSEL9_Pos); //AF7 (USART1_TX)
SET_TO(GPIOA->MODER, GPIO_MODER_MODE9, 2u << GPIO_MODER_MODE9_Pos); // Alternate Function
GPIOA->OTYPER &= ~GPIO_OTYPER_OT_9; // push/pull
GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD9; // no pullup, no pulldown
m_usart->BRR = (4100000) /115200L; // set baudrate (APBCLK / baud)
m_usart->CR1 |= (USART_CR1_RE | USART_CR1_TE); // RX, TX enable
// TODO: Don't hardcode the main clock value here
m_usart->BRR = (4100000) / 115200L; // set baudrate (APBCLK / baud)
m_usart->CR1 |= (USART_CR1_TE); // TX enable
m_usart->CR1 |= USART_CR1_UE; // USART enable
}