460 lines
12 KiB
C++
460 lines
12 KiB
C++
/*
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* Copyright (C) 2019 Max Regan
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <new>
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#include "Bsp/Drivers/RtcDriver.h"
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#include "Bsp/macros.h"
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namespace BSP {
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using BSP::ReturnCode;
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using BSP::time_t;
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RtcDriver::RtcSystemTimer RtcDriver::m_sys_timer;
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ReturnCode RtcDriver::init()
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{
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m_alarm_count = 0;
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m_wakeup_count = 0;
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init_hw();
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return ReturnCode::OK;
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}
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void RtcDriver::enable_rtc_write()
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{
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/*<! Disable write protection */
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RTC->WPR = 0xCA;
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RTC->WPR = 0x53;
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}
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void RtcDriver::disable_rtc_write()
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{
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/*<! Enable write protection */
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RTC->WPR = 0x00;
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}
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void RtcDriver::enable_periodic_alarm()
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{
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SET(RTC->ALRMAR, RTC_ALRMAR_MSK4 | RTC_ALRMAR_MSK3 | RTC_ALRMAR_MSK2 | RTC_ALRMAR_MSK1);
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// Only calculate alarms when second rolls over
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SET_TO(RTC->ALRMASSR, RTC_ALRMASSR_MASKSS, RTC_ALRMASSR_MASKSS);
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CLR(RTC->CR, RTC_CR_ALRAE | RTC_CR_ALRAIE);
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#if defined(STM32L0XX)
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SET(EXTI->IMR, EXTI_IMR_IM17);
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SET(EXTI->RTSR, EXTI_RTSR_RT17);
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#elif defined(STM32L4XX)
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SET(EXTI->IMR1, EXTI_IMR1_IM18);
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SET(EXTI->RTSR1, EXTI_RTSR1_RT18);
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NVIC_EnableIRQ(RTC_Alarm_IRQn);
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NVIC_SetPriority(RTC_Alarm_IRQn, 0);
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SET(RTC->SCR, RTC_SCR_CALRAF);
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#else
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#error "Unsupported family"
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#endif
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SET(RTC->CR, RTC_CR_ALRAE);
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SET(RTC->CR, RTC_CR_ALRAIE);
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}
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ReturnCode RtcDriver::init_hw()
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{
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#if defined(STM32L0XX)
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uint32_t temp = RCC->CSR;
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SET(RCC->CSR, RCC_CSR_RTCRST);
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SET(RCC->APB1ENR, RCC_APB1ENR_PWREN);
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SET(PWR->CR, PWR_CR_DBP);
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/*<! Set RTC input clock to the LSE (low-speed external 32.768kHz) clock */
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if (!(RCC->CSR & RCC_CSR_LSERDY)) {
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// TODO: Does this help?
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SET(temp, RCC_CSR_LSEON);
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}
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SET_TO(temp, RCC_CSR_RTCSEL, RCC_CSR_RTCSEL_0);
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SET(temp, RCC_CSR_RTCEN);
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RCC->CSR = temp;
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while (!(RCC->CSR & RCC_CSR_LSERDY)) {}
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enable_rtc_write();
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RTC->ISR = RTC_ISR_INIT;
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while (!(RTC->ISR & RTC_ISR_INITF)) {}
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#elif defined(STM32L4XX)
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uint32_t temp = RCC->CSR;
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// Reset the backup domain (includes the RTC)
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SET(RCC->BDCR, RCC_BDCR_BDRST);
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CLR(RCC->BDCR, RCC_BDCR_BDRST);
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SET(RCC->APB1ENR1, RCC_APB1ENR1_PWREN);
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SET(PWR->CR1, PWR_CR1_DBP);
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SET(temp, RCC_BDCR_LSEON);
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// while (!(RCC->BDCR & RCC_BDCR_LSERDY)) {}
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SET_TO(temp, RCC_BDCR_RTCSEL, RCC_BDCR_RTCSEL_0);
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SET(temp, RCC_BDCR_RTCEN);
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RCC->BDCR = temp;
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while (!(RCC->BDCR & RCC_BDCR_LSERDY)) {}
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enable_rtc_write();
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RTC->ICSR = RTC_ICSR_INIT;
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while (!(RTC->ICSR & RTC_ICSR_INITF)) {}
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#else
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#error "Unsupported device type"
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#endif
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/*<! Set the Clock Prescalers (32.768kHz / 1 / 32768 = 1Hz */
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/*<! Set the Async prescaler to the Maximum (divide the clock by 128) */
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SET_TO(RTC->PRER, RTC_PRER_PREDIV_A, 0);
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/*<! Set the Syncronous scaler so the RTC updates at 1Hz */
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SET_TO(RTC->PRER, RTC_PRER_PREDIV_S, (LSE_CLOCK_FREQ - 1));
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/*<! Load initial date and time */
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// 24-Hour format
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CLR(RTC->CR, RTC_CR_FMT);
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uint32_t time = 0;
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SET(time, RTC_TR_PM);
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SET_TO(time, RTC_TR_HT, 1 << RTC_TR_HT_Pos);
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SET_TO(time, RTC_TR_HU, 0 << RTC_TR_HU_Pos);
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SET_TO(time, RTC_TR_MNT, 0 << RTC_TR_MNT_Pos);
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SET_TO(time, RTC_TR_MNU, 9 << RTC_TR_MNU_Pos);
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SET_TO(time, RTC_TR_ST, 3 << RTC_TR_ST_Pos);
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SET_TO(time, RTC_TR_SU, 6 << RTC_TR_SU_Pos);
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RTC->TR = time;
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#if defined(STM32L0XX)
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CLR(RTC->ISR, RTC_ISR_INIT);
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SET(EXTI->IMR, EXTI_IMR_IM20);
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SET(EXTI->RTSR, EXTI_RTSR_RT20);
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// Enable Wakeup irq, we may/will use them later
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SET(RTC->CR, RTC_CR_WUTIE);
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NVIC_EnableIRQ(RTC_IRQn);
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NVIC_SetPriority(RTC_IRQn, 1);
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enable_periodic_alarm();
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// Clear the interrupt in the RTC
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CLR(RTC->ISR, RTC_ISR_WUTF);
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#elif defined(STM32L4XX)
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CLR(RTC->ICSR, RTC_ICSR_INIT);
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SET(EXTI->IMR1, EXTI_IMR1_IM20);
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SET(EXTI->RTSR1, EXTI_RTSR1_RT20);
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// Enable Wakeup irq, we may/will use them later
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SET(RTC->CR, RTC_CR_WUTIE);
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NVIC_EnableIRQ(RTC_WKUP_IRQn);
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NVIC_SetPriority(RTC_WKUP_IRQn, 0);
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enable_periodic_alarm();
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// Clear the interrupt in the RTC
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SET(RTC->SCR, RTC_SCR_CWUTF);
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#else
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#error "Unsupported device type"
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#endif
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// Disable the wakeup timer. This can be leftover from an old firmware/reset
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CLR(RTC->CR, RTC_CR_WUTE);
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disable_rtc_write();
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return ReturnCode::OK;
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}
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ReturnCode RtcDriver::get_time(BSP::WallClockTime &wall_time)
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{
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/*<! The value of TR in the shadow register is locked when SSR is
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read (by the system timer), until the date register is read. We're
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not using the date here, but we do need to clear the stale value. */
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(void) RTC->DR;
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// TODO: reread TR + PM for consistency
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uint32_t time = RTC->TR;
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unsigned int hours = 0, minutes = 0, seconds = 0;
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hours += 10 * STM32_GET_FIELD(time, RTC_TR_HT);
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hours += STM32_GET_FIELD(time, RTC_TR_HU);
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minutes += 10 * STM32_GET_FIELD(time, RTC_TR_MNT);
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minutes += STM32_GET_FIELD(time, RTC_TR_MNU);
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seconds += 10 * STM32_GET_FIELD(time, RTC_TR_ST);
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seconds += STM32_GET_FIELD(time, RTC_TR_SU);
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new (&wall_time) BSP::WallClockTime(hours, minutes, seconds);
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return ReturnCode::OK;
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}
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ReturnCode RtcDriver::set_time(const BSP::WallClockTime &wall_time)
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{
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enable_rtc_write();
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#if defined(STM32L0XX)
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RTC->ISR = RTC_ISR_INIT;
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while (!(RTC->ISR & RTC_ISR_INITF)) {}
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#elif defined(STM32L4XX)
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RTC->ICSR = RTC_ICSR_INIT;
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while (!(RTC->ICSR & RTC_ICSR_INITF)) {}
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#else
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#error "Unsupported device type"
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#endif
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/*<! Load initial date and time */
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uint32_t time = 0;
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SET_TO(time, RTC_TR_HT, wall_time.get_hours_24_tens() << RTC_TR_HT_Pos);
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SET_TO(time, RTC_TR_HU, wall_time.get_hours_24_ones() << RTC_TR_HU_Pos);
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SET_TO(time, RTC_TR_MNT, wall_time.get_minutes_tens() << RTC_TR_MNT_Pos);
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SET_TO(time, RTC_TR_MNU, wall_time.get_minutes_ones() << RTC_TR_MNU_Pos);
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SET_TO(time, RTC_TR_ST, wall_time.get_seconds_tens() << RTC_TR_ST_Pos);
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SET_TO(time, RTC_TR_SU, wall_time.get_seconds_ones() << RTC_TR_SU_Pos);
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RTC->TR = time;
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#if defined(STM32L0XX)
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CLR(RTC->ISR, RTC_ISR_INIT);
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while (!(RTC->ISR & RTC_ISR_INITF)) {} // FIXME: this is probably inverted
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while (!(RTC->ISR & RTC_ISR_RSF)) {}
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#elif defined(STM32L4XX)
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CLR(RTC->ICSR, RTC_ICSR_INIT);
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while ((RTC->ICSR & RTC_ICSR_INITF)) {}
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while (!(RTC->ICSR & RTC_ICSR_RSF)) {}
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#else
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#error "Unsupported device type"
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#endif
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disable_rtc_write();
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return ReturnCode::OK;
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}
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ReturnCode RtcDriver::set_wakeup_in(BSP::time_t wakeup_delay)
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{
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/*<! 2^64 / (1000000 * 32768) / 60 / 60 / 24 / 365 = ~17.85 This
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value will only overflow for wakeup_delays > 17.85 years, so
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this is fine. */
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uint64_t delay_cycles = BSP::Time::to_micros(wakeup_delay) * LSE_CLOCK_FREQ /
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BSP::Time::MICROS_PER_SEC;
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enable_rtc_write();
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/*<! If there is an ongoing wakeup, disable it */
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if (RTC->CR & RTC_CR_WUTE) {
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CLR(RTC->CR, RTC_CR_WUTE);
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#if defined(STM32L0XX)
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while (!(RTC->ISR & RTC_ISR_WUTWF)) {}
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#elif defined(STM32L4XX)
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while (!(RTC->ICSR & RTC_ICSR_WUTWF)) {}
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#else
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#error "Unsupported device type"
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#endif
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}
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uint32_t wucksel = 0;
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if (delay_cycles == 0) {
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return ReturnCode::FAIL;
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} else if (delay_cycles < 0x20000) {
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delay_cycles /= 2;
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wucksel = 3;
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} else if (delay_cycles <= 0x40000) {
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delay_cycles /= 4;
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wucksel = 2;
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} else if (delay_cycles <= 0x80000) {
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delay_cycles /= 8;
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wucksel = 1;
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} else if (delay_cycles <= 0x100000) {
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delay_cycles /= 16;
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wucksel = 0;
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} else {
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wucksel = 4;
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delay_cycles /= 32768;
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}
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SET_TO(RTC->WUTR, RTC_WUTR_WUT, delay_cycles - 1);
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SET_TO(RTC->CR, RTC_CR_WUCKSEL, wucksel << RTC_CR_WUCKSEL_Pos);
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// Clear any pending wakeup flags
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#if defined(STM32L0XX)
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CLR(RTC->ISR, RTC_ISR_WUTF);
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#elif defined(STM32L4XX)
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SET(RTC->SCR, RTC_SCR_CWUTF);
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#else
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#error "Unsupported family"
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#endif
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// Finally, enable the timer
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SET(RTC->CR, RTC_CR_WUTE);
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disable_rtc_write();
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return ReturnCode::OK;
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}
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BSP::time_t RtcDriver::RtcSystemTimer::get_time()
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{
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uint32_t new_secs, old_secs, ssr;
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uint64_t new_timer_ticks, new_millis;
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enable_rtc_write();
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#if defined(STM32L0XX)
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CLR(RTC->ISR, RTC_ISR_RSF);
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disable_rtc_write();
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while (!(RTC->ISR & RTC_ISR_RSF)) {}
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#elif defined(STM32L4XX)
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CLR(RTC->ICSR, RTC_ICSR_RSF);
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disable_rtc_write();
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while (!(RTC->ICSR & RTC_ICSR_RSF)) {}
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#else
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#error "Unsupported family"
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#endif
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do {
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__disable_irq();
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old_secs = m_seconds;
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ssr = RTC->SSR & 0xFFFF;
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new_secs = m_seconds;
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__enable_irq();
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} while (new_secs != old_secs);
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new_timer_ticks = (uint64_t) new_secs * LSE_CLOCK_FREQ;
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/** SSR is a countdown register */
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new_millis = (new_timer_ticks + LSE_CLOCK_FREQ - 1 - ssr) * BSP::Time::MILLIS_PER_SEC / LSE_CLOCK_FREQ;
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return BSP::Time::millis(new_millis);
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}
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void RtcDriver::RtcSystemTimer::increment_seconds()
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{
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m_seconds++;
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}
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void RtcDriver::increment_seconds()
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{
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m_sys_timer.increment_seconds();
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}
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uint32_t RtcDriver::m_wakeup_count = 0;
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uint32_t RtcDriver::m_alarm_count = 0;
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void RtcDriver::increment_wakeup_count()
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{
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m_wakeup_count++;
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}
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void RtcDriver::increment_alarm_count()
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{
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m_alarm_count++;
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}
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uint32_t RtcDriver::get_wakeup_count() {
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return m_wakeup_count;
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}
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uint32_t RtcDriver::get_alarm_count() {
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return m_alarm_count;
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}
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#if defined(STM32L0XX)
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extern "C" void RTC_IRQHandler()
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{
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// Clear the wakeup and alarm irq in the EXTI
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SET(EXTI->PR, EXTI_PR_PIF20 | EXTI_PR_PIF17);
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if (RTC->ISR & RTC_ISR_ALRAF) {
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RtcDriver::increment_seconds();
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RtcDriver::increment_alarm_count();
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CLR(RTC->ISR, RTC_ISR_ALRAF);
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}
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if (RTC->ISR & RTC_ISR_WUTF) {
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RtcDriver::increment_wakeup_count();
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// Clear the interrupt in the RTC
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CLR(RTC->ISR, RTC_ISR_WUTF);
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// Disable the Wakeup timer (its periodic, but we use it as a
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// one-shot timer
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CLR(RTC->CR, RTC_CR_WUTE);
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}
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}
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#elif defined(STM32L4XX)
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static void irq_handler() {
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if (RTC->SR & RTC_ICSR_WUTWF) {
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SET(EXTI->PR1, EXTI_PR1_PIF20);
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RtcDriver::increment_wakeup_count();
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// Clear the interrupt in the RTC
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SET(RTC->SCR, RTC_SCR_CWUTF);
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// Disable the Wakeup timer (its periodic, but we use it as a
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// one-shot timer
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CLR(RTC->CR, RTC_CR_WUTE);
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}
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if (RTC->SR & RTC_SR_ALRAF) {
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SET(EXTI->PR1, EXTI_PR1_PIF18);
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RtcDriver::increment_alarm_count();
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RtcDriver::increment_seconds();
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SET(RTC->SCR, RTC_SCR_CALRAF);
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}
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}
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extern "C" void RTC_WKUP_IRQHandler()
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{
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irq_handler();
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}
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extern "C" void RTC_ALARM_IRQHandler()
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{
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irq_handler();
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}
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#else
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#error "Unsupported device type"
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#endif
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}
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