121 lines
3.5 KiB
C
121 lines
3.5 KiB
C
/*
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* Copyright (C) 2019 Max Regan
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "rtc.h"
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#include "stm32l0xx.h"
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#include "macros.h"
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static void enable_rtc_write()
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{
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/*<! Disable write protection */
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RTC->WPR = 0xCA;
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RTC->WPR = 0x53;
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}
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static void disable_rtc_write()
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{
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/*<! Disable write protection */
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RTC->WPR = 0x00;
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}
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uint32_t bin_to_bcd(uint32_t bin)
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{
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uint32_t bcd = 0;
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while (bin > 0) {
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bcd <<= 4;
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bcd |= bin % 10;
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bin /= 10;
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}
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return bcd;
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}
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void rtc_init()
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{
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uint32_t temp = RCC->CSR;
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SET(RCC->CSR, RCC_CSR_RTCRST);
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SET(RCC->APB1ENR, RCC_APB1ENR_PWREN);
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SET(PWR->CR, PWR_CR_DBP);
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/*<! Set RTC input clock to the LSI (low-speed internal 32.768kHz) clock */
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SET(temp, RCC_CSR_LSEON);
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SET_TO(temp, RCC_CSR_RTCSEL, RCC_CSR_RTCSEL_0);
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SET(temp, RCC_CSR_RTCEN);
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RCC->CSR = temp;
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while (!(RCC->CSR & RCC_CSR_LSERDY)) {}
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enable_rtc_write();
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RTC->ISR = RTC_ISR_INIT;
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while (!(RTC->ISR & RTC_ISR_INITF)) {}
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/*<! Set the Clock Prescalers (32.768kHz / 128 / 256 = 1Hz */
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/*<! Set the Async prescaler to the Maximum (divide the clock by 128) */
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SET_TO(RTC->PRER, RTC_PRER_PREDIV_A, RTC_PRER_PREDIV_A);
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/*<! Set the Syncronous scaler (divide the clock by 255 + 1) */
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SET_TO(RTC->PRER, RTC_PRER_PREDIV_S, 255);
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/*<! Load initial date and time */
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// TODO
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/* uint32_t time = 0; */
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/* uint32_t date = 0; */
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/*<! Set the date and time format */
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// TODO: currently defaults to 24hr
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// 12-Hour format
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SET(RTC->CR, RTC_CR_FMT);
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uint32_t time = 0;
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SET(time, RTC_TR_PM);
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SET_TO(time, RTC_TR_HT, 1 << RTC_TR_HT_Pos);
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SET_TO(time, RTC_TR_HU, 2 << RTC_TR_HU_Pos);
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SET_TO(time, RTC_TR_MNT, 5 << RTC_TR_MNT_Pos);
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SET_TO(time, RTC_TR_MNU, 9 << RTC_TR_MNU_Pos);
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SET_TO(time, RTC_TR_ST, 0 << RTC_TR_ST_Pos);
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SET_TO(time, RTC_TR_SU, 0 << RTC_TR_SU_Pos);
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RTC->TR = time;
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CLR(RTC->ISR, RTC_ISR_INIT);
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disable_rtc_write();
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}
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void rtc_get_time_bcd(struct time_bcd *tm_bcd)
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{
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uint32_t time = RTC->TR;
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tm_bcd->hour_tens = STM32_GET_FIELD(time, RTC_TR_HT);
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tm_bcd->hour_ones = STM32_GET_FIELD(time, RTC_TR_HU);
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tm_bcd->minute_tens = STM32_GET_FIELD(time, RTC_TR_MNT);
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tm_bcd->minute_ones = STM32_GET_FIELD(time, RTC_TR_MNU);
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tm_bcd->second_tens = STM32_GET_FIELD(time, RTC_TR_ST);
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tm_bcd->second_ones = STM32_GET_FIELD(time, RTC_TR_SU);
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tm_bcd->pm = STM32_GET_FIELD(time, RTC_TR_PM);
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}
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