timely-reference/RtcDriver.cpp

/*
 * Copyright (C) 2019  Max Regan
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */

#include "RtcDriver.h"
#include "macros.h"

namespace BSP {

using Common::ReturnCode;
using Common::time_t;

RtcDriver::RtcSystemTimer RtcDriver::m_sys_timer;

void RtcDriver::enable_rtc_write()
{
    /*<! Disable write protection */
    RTC->WPR = 0xCA;
    RTC->WPR = 0x53;
}

void RtcDriver::disable_rtc_write()
{
    /*<! Disable write protection */
    RTC->WPR = 0x00;
}

void RtcDriver::enable_periodic_alarm()
{

    SET(RTC->ALRMAR, RTC_ALRMAR_MSK4 | RTC_ALRMAR_MSK3 | RTC_ALRMAR_MSK2 | RTC_ALRMAR_MSK1);

    SET(RTC->ALRMASSR, RTC_ALRMASSR_MASKSS);
    CLR(RTC->ALRMASSR, RTC_ALRMASSR_SS);

    SET(RTC->CR, RTC_CR_ALRAE);
}

ReturnCode RtcDriver::init_hw()
{
    uint32_t temp = RCC->CSR;

    SET(RCC->CSR, RCC_CSR_RTCRST);
    SET(RCC->APB1ENR, RCC_APB1ENR_PWREN);
    SET(PWR->CR, PWR_CR_DBP);

    /*<! Set RTC input clock to the LSE (low-speed external 32.768kHz) clock */
    if (!(RCC->CSR & RCC_CSR_LSERDY)) {
        // TODO: Does this help?
        SET(temp, RCC_CSR_LSEON);
    }

    SET_TO(temp, RCC_CSR_RTCSEL, RCC_CSR_RTCSEL_0);
    SET(temp, RCC_CSR_RTCEN);
    RCC->CSR = temp;

    while (!(RCC->CSR & RCC_CSR_LSERDY)) {}

    enable_rtc_write();

    RTC->ISR = RTC_ISR_INIT;
    while (!(RTC->ISR & RTC_ISR_INITF)) {}

    /*<! Set the Clock Prescalers (32.768kHz / 1 / 32768 = 1Hz */
    /*<! Set the Async prescaler to the Maximum (divide the clock by 128) */
    SET_TO(RTC->PRER, RTC_PRER_PREDIV_A, 0);
    /*<! Set the Syncronous scaler so the RTC updates at 1Hz */
    SET_TO(RTC->PRER, RTC_PRER_PREDIV_S, (LSE_CLOCK_FREQ - 1));

    /*<! Load initial date and time */

    // 12-Hour format
    SET(RTC->CR, RTC_CR_FMT);

    uint32_t time = 0;
    SET(time, RTC_TR_PM);
    SET_TO(time, RTC_TR_HT, 1 << RTC_TR_HT_Pos);
    SET_TO(time, RTC_TR_HU, 2 << RTC_TR_HU_Pos);
    SET_TO(time, RTC_TR_MNT, 5 << RTC_TR_MNT_Pos);
    SET_TO(time, RTC_TR_MNU, 9 << RTC_TR_MNU_Pos);
    SET_TO(time, RTC_TR_ST, 0 << RTC_TR_ST_Pos);
    SET_TO(time, RTC_TR_SU, 0 << RTC_TR_SU_Pos);
    RTC->TR = time;

    CLR(RTC->ISR, RTC_ISR_INIT);

    SET(EXTI->IMR, EXTI_IMR_IM20);
    SET(EXTI->EMR, EXTI_EMR_EM20);
    SET(EXTI->RTSR, EXTI_RTSR_RT20);

    // Enable Wakeup interrupts, we may/will use them later
    SET(RTC->CR, RTC_CR_WUTIE);
    NVIC_EnableIRQ(RTC_IRQn);
    NVIC_SetPriority(RTC_IRQn, 0);

    enable_periodic_alarm();

    disable_rtc_write();

    return ReturnCode::OK;
}

ReturnCode RtcDriver::get_time(time_bcd &tm_bcd)
{
    /*<! The value of TR in the shadow register is locked when SSR is
    read (by the system timer), until the date register is read. We're
    not using the date here, but we do need to clear the stale value. */
    (void) RTC->DR;

    uint32_t time = RTC->TR;

    tm_bcd.hour_tens = STM32_GET_FIELD(time, RTC_TR_HT);
    tm_bcd.hour_ones = STM32_GET_FIELD(time, RTC_TR_HU);

    tm_bcd.minute_tens = STM32_GET_FIELD(time, RTC_TR_MNT);
    tm_bcd.minute_ones = STM32_GET_FIELD(time, RTC_TR_MNU);

    tm_bcd.second_tens = STM32_GET_FIELD(time, RTC_TR_ST);
    tm_bcd.second_ones = STM32_GET_FIELD(time, RTC_TR_SU);

    tm_bcd.pm = STM32_GET_FIELD(time, RTC_TR_PM);

    return ReturnCode::OK;
}

ReturnCode RtcDriver::init()
{
    init_hw();

    return ReturnCode::OK;
}

ReturnCode RtcDriver::set_wakeup_in(Common::time_t wakeup_delay)
{
    /*<! 2^64 / (1000000 * 32768) / 60 / 60 / 24 / 365 = ~17.85 This
    value will only overflow for wakeup_delays > 17.85 years, so
    this is fine. */
    uint64_t delay_cycles = Common::Time::to_micros(wakeup_delay) * LSE_CLOCK_FREQ / Common::Time::MICROS_PER_SEC;

    enable_rtc_write();

    /*<! If there is an ongoing wakeup, disable it */
    if (RTC->CR & RTC_CR_WUTE) {
        CLR(RTC->CR, RTC_CR_WUTE);
        while (!(RTC->ISR & RTC_ISR_WUTWF)) {}
    }

    uint32_t wucksel = 0;

    if (delay_cycles == 0) {
        return ReturnCode::FAIL;
    } else if (delay_cycles < 0x10000) {
        delay_cycles /= 2;
        wucksel = 3;
    } else if (delay_cycles <= 0x20000) {
        delay_cycles /= 4;
        wucksel = 2;
    } else if (delay_cycles <= 0x40000) {
        delay_cycles /= 8;
        wucksel = 1;
    } else if (delay_cycles <= 0x80000) {
        delay_cycles /= 16;
        wucksel = 0;
    } else {
#if 0
        // TODO: implement longer delays using ck_spre as clock source
        // TODO: the datasheet text and block diagram disagree- is it using clock_spre or clock_apre?
        wucksel = 4;
        delay_cycles >>= async_prediv; //
#else
        return ReturnCode::FAIL;
#endif
    }

    SET_TO(RTC->WUTR, RTC_WUTR_WUT, delay_cycles - 1);
    SET_TO(RTC->CR, RTC_CR_WUCKSEL, wucksel << RTC_CR_WUCKSEL_Pos);

    SET(RTC->CR, RTC_CR_WUTE);

    disable_rtc_write();

    return ReturnCode::OK;
}

Common::time_t RtcDriver::RtcSystemTimer::get_time()
{
    uint32_t new_secs, old_secs, ssr, subsecond;
    do {
        old_secs = m_seconds;
        ssr = RTC->SSR & 0xFFFF;
        new_secs = m_seconds;
    } while (new_secs != old_secs);

    new_secs = new_secs * LSE_CLOCK_FREQ;
    /** SSR is a countdown register */
    subsecond = (new_secs + LSE_CLOCK_FREQ - 1 - ssr) * Common::Time::MILLIS_PER_SEC / LSE_CLOCK_FREQ;
    return Common::Time::millis(subsecond);
}

void RtcDriver::RtcSystemTimer::increment_seconds()
{
    m_seconds++;
}

void RtcDriver::increment_seconds()
{
    m_sys_timer.increment_seconds();
}

extern "C" void RTC_IRQHandler()
{
    // Clear the interrupt in the EXTI
    SET(EXTI->PR, EXTI_PR_PIF20);

    if (RTC->ISR & RTC_ISR_ALRAF) {
        RtcDriver::increment_seconds();

        CLR(RTC->ISR, RTC_ISR_ALRAF);

    }

    if (RTC->ISR & RTC_ISR_WUTF) {
        // Clear the interrupt in the RTC
        CLR(RTC->ISR, RTC_ISR_WUTF);
        // Disable the Wakeup timer (its periodic, but we use it as a
        // one-shot timer
        CLR(RTC->CR, RTC_CR_WUTE);
    }

}

}