118 lines
3.4 KiB
C++
118 lines
3.4 KiB
C++
/*
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* Copyright (C) 2019 Max Regan
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "Bsp/Drivers/SpiDriver.h"
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#include "Bsp/macros.h"
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namespace BSP {
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using RC = Common::ReturnCode;
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using Common::Schedule::TaskScheduler;
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using Common::Schedule::NextTime;
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using Common::Time;
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SpiDriver::SpiDriver(TaskScheduler &scheduler)
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: m_scheduler(scheduler)
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, m_spi(SPI1)
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{}
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void SpiDriver::init()
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{
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SET(RCC->IOPENR, RCC_IOPENR_IOPAEN);
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SET(RCC->IOPENR, RCC_IOPENR_IOPBEN);
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RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
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/* Assign SPI_MOSI to PB1, since PA7 is taken by LPTIM_OUT */
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GPIOB->AFR[0] &= ~GPIO_AFRH_AFRH1;
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GPIOB->AFR[0] |= 1u << GPIO_AFRH_AFRH1_Pos;
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SET_TO(GPIOB->MODER, GPIO_MODER_MODE1, 2u << GPIO_MODER_MODE1_Pos);
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GPIOB->OTYPER &= ~GPIO_OTYPER_OT_1;
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GPIOB->PUPDR &= ~GPIO_PUPDR_PUPD12;
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// SPI1 NSS (PA4)
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SET_TO(GPIOA->MODER, GPIO_MODER_MODE4, 1u << GPIO_MODER_MODE4_Pos);
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GPIOA->OTYPER &= ~GPIO_OTYPER_OT_4;
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GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD4;
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// SPI1 SCK (PA5)
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GPIOA->AFR[0] &= ~GPIO_AFRL_AFRL5;
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SET_TO(GPIOA->MODER, GPIO_MODER_MODE5, 2u << GPIO_MODER_MODE5_Pos);
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GPIOA->OTYPER &= ~GPIO_OTYPER_OT_5;
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GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD5;
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// SPI1 MISO (PA6)
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GPIOA->AFR[0] &= ~GPIO_AFRL_AFRL6;
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SET_TO(GPIOA->MODER, GPIO_MODER_MODE6, 2u << GPIO_MODER_MODE6_Pos);
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GPIOA->OTYPER &= ~GPIO_OTYPER_OT_6;
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GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD6;
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// Enable Master mode and half the baud rate, so it's set to ~1MHz
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m_spi->CR1 |= SPI_CR1_MSTR | SPI_CR1_LSBFIRST | SPI_CR1_SSM;
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//m_spi->CR1 |= 1u << SPI_CR1_BR_Pos;
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m_spi->CR2 |= SPI_CR2_SSOE;
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}
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NextTime SpiDriver::execute()
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{
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return NextTime::never();
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}
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RC SpiDriver::tx_blocking(const uint8_t *data, size_t len)
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{
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if (len <= 0) {
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return RC::FAIL;
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}
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m_spi->CR1 |= SPI_CR1_SPE;
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//FLIP(GPIOB->ODR, GPIO_ODR_OD3);
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CLR(m_spi->CR1, SPI_CR1_SSI);
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SET(GPIOA->ODR, GPIO_ODR_OD4);
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for (size_t i = 0; i < len; i++) {
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while (!(m_spi->SR & SPI_SR_TXE)) {}
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m_spi->DR = data[i];
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}
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//FLIP(GPIOB->ODR, GPIO_ODR_OD3);
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while (!(m_spi->SR & SPI_SR_TXE)) {}
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// Ensure that NSS is held for long enough to meet the display's thSCS
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for (int i = 0; i < 4; i++);
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m_spi->CR1 &= ~SPI_CR1_SPE;
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SET(m_spi->CR1, SPI_CR1_SSI);
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CLR(GPIOA->ODR, GPIO_ODR_OD4);
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return RC::OK;
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}
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}
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