Full color support, rework the directory structure

This commit is contained in:
2019-08-05 22:15:40 -07:00
parent 77f09bca16
commit d5ddd76bef
121 changed files with 93737 additions and 702 deletions

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/*
* Copyright (C) 2019 Max Regan
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <cstring>
#include "Bsp/Drivers/DisplayDriver.h"
#include "Bsp/macros.h"
#include "Bsp/font.h"
namespace BSP {
using Common::Schedule::NextTime;
using Common::ReturnCode;
DisplayDriver::DisplayDriver(Common::Schedule::TaskScheduler &scheduler, SpiDriver &spi)
: m_scheduler(scheduler)
, m_spi(spi)
, m_is_dirty(true)
, m_dirty_line_min(0)
, m_dirty_line_max(0)
{
buffer_init(DEFAULT_COLOR);
}
ReturnCode DisplayDriver::init()
{
return Common::ReturnCode::OK;
}
NextTime DisplayDriver::execute()
{
return NextTime::never();
}
// TODO: write my own implementation
#define R2(n) n, n + 2*64, n + 1*64, n + 3*64
#define R4(n) R2(n), R2(n + 2*16), R2(n + 1*16), R2(n + 3*16)
#define R6(n) R4(n), R4(n + 2*4 ), R4(n + 1*4 ), R4(n + 3*4 )
static constexpr unsigned char BitReverseTable256[256] =
{
R6(0), R6(2), R6(1), R6(3)
};
unsigned char ReverseBitsLookupTable(unsigned char v)
{
return BitReverseTable256[v];
}
void DisplayDriver::buffer_init(Color color)
{
uint8_t dataval = 0xFF;
if (color == Color::BLACK) {
dataval = 0x00;
}
// TODO: Support initializing to other colors
for (size_t i = 0; i < ARRAY_SIZE(m_buffer.lines); i++) {
struct display_line &line = m_buffer.lines[i];
line.mode = 1; // Update display
line.line = i + 1; // Line numbers start at 1
for (size_t j = 0; j < ARRAY_SIZE(line.data); j++) {
line.data[j] = dataval;
}
}
m_buffer.dummy = 0;
}
void DisplayDriver::set_dirty(unsigned int y)
{
if (!m_is_dirty) {
m_is_dirty = true;
m_dirty_line_min = y;
m_dirty_line_max = y;
} else {
m_dirty_line_min = MIN(y, m_dirty_line_min);
m_dirty_line_max = MAX(y, m_dirty_line_max);
}
}
// TODO: write my own implementation
#define R2(n) n, n + 2*64, n + 1*64, n + 3*64
#define R4(n) R2(n), R2(n + 2*16), R2(n + 1*16), R2(n + 3*16)
#define R6(n) R4(n), R4(n + 2*4 ), R4(n + 1*4 ), R4(n + 3*4 )
void DisplayDriver::draw_hline(uint32_t x, uint32_t y, uint32_t width, Color color)
{
for (uint32_t i = 0; i < width; i++) {
set_pixel(x + i, y, color);
}
}
void DisplayDriver::write_glyph(uint32_t x_off, uint32_t y_off,
const struct font *f, const struct glyph *g,
Color color)
{
for (size_t x = 0; x < g->width; x++) {
for (size_t y = 0; y < g->height; y++) {
uint32_t byte_x = x / 8;
uint32_t bit_x = 7 - (x % 8);
uint8_t bit = (g->bitmap[byte_x + g->width_bytes * y] >> bit_x) & 1;
if (bit) {
set_pixel(g->left + x_off + x, y_off + y + f->height - g->top, color);
}
}
}
}
void DisplayDriver::char_at(uint32_t *x_off, uint32_t y_off, char c, const struct font *font, Color color)
{
const struct glyph *g = glyph_for_char(font, c);
if (g == NULL) {
return;
}
if (*x_off + font->width >= DISPLAY_WIDTH) {
return;
}
write_glyph(*x_off, y_off, font, g, color);
m_dirty_line_min = MIN(m_dirty_line_min, y_off);
m_dirty_line_max = MAX(m_dirty_line_max, y_off + g->height);
m_is_dirty = true;
*x_off += font->width;
}
void DisplayDriver::string_at(uint32_t *x_off, uint32_t y_off, const char *string, const struct font *font, Color color)
{
int i = 0;
while (string[i]) {
char_at(x_off, y_off, string[i], font, color);
i++;
}
}
void DisplayDriver::refresh()
{
if (!m_is_dirty) {
return;
}
uint8_t *start = (uint8_t *) &m_buffer.lines[m_dirty_line_min];
// Data size
size_t size = sizeof(m_buffer.lines[0]) * (m_dirty_line_max - m_dirty_line_min + 1);
// Trailer dummy data
size += 2;
m_spi.tx_blocking(start, size);
m_is_dirty = false;
m_dirty_line_min = DISPLAY_HEIGHT - 1;
m_dirty_line_max = 0;
}
void DisplayDriver::clear(Color color)
{
buffer_init(color);
m_is_dirty = true;
m_dirty_line_min = 0;
m_dirty_line_max = DISPLAY_HEIGHT - 1;
}
//TODO: put me somewhere fonty
const struct glyph *DisplayDriver::glyph_for_char(const struct font *font, char c)
{
return font->glyphs[(size_t) c];
}
}

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/*
* Copyright (C) 2019 Max Regan
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#pragma once
#include "Bsp/Task.h"
#include "Bsp/Drivers/SpiDriver.h"
#include "Bsp/font.h"
namespace BSP {
class DisplayDriver final : public Common::Schedule::Task {
public:
DisplayDriver(Common::Schedule::TaskScheduler &scheduler, SpiDriver &spi);
/**
* Common::Schedule::Task
*/
Common::ReturnCode init();
Common::Schedule::NextTime execute() override;
static constexpr uint32_t BITS_PER_PIXEL = 3;
enum class Color : uint8_t {
BLACK = 0,
BLUE = 4,
GREEN = 2,
CYAN = 6,
RED = 1,
MAGENTA = 5,
YELLOW = 3,
WHITE = 7,
};
static constexpr Color DEFAULT_COLOR = Color::BLACK;
/**
* DisplayDriver
*/
void inline set_pixel(uint32_t x, uint32_t y, Color color=DEFAULT_COLOR);
void char_at(uint32_t *x_off, uint32_t y_off, char c, const struct font *font, Color color=DEFAULT_COLOR);
void string_at(uint32_t *x_off, uint32_t y_off,
const char *string, const struct font *font,
Color color=DEFAULT_COLOR);
void draw_hline(uint32_t x, uint32_t y, uint32_t width, Color color=DEFAULT_COLOR);
void refresh();
void clear(Color color=Color::WHITE);
inline uint32_t get_width() {
return DISPLAY_WIDTH;
}
inline uint32_t get_height() {
return DISPLAY_HEIGHT;
}
private:
void buffer_init(Color color);
void set_dirty(unsigned int y);
const struct glyph *glyph_for_char(const struct font *font, char c);
void write_glyph(uint32_t x_off, uint32_t y_off,
const struct font *font, const struct glyph *g,
Color color);
static constexpr uint32_t DISPLAY_WIDTH = 128;
static constexpr uint32_t DISPLAY_HEIGHT = 128;
struct display_line
{
uint8_t mode;
uint8_t line;
uint8_t data[DISPLAY_WIDTH * BITS_PER_PIXEL / 8];
};
struct display_buffer
{
struct display_line lines[DISPLAY_HEIGHT];
uint16_t dummy;
};
Common::Schedule::TaskScheduler &m_scheduler;
SpiDriver &m_spi;
struct display_buffer m_buffer;
bool m_is_dirty;
uint8_t m_dirty_line_min;
uint8_t m_dirty_line_max;
};
void inline DisplayDriver::set_pixel(uint32_t x, uint32_t y, Color color)
{
struct display_line &line = m_buffer.lines[y];
uint32_t x_pos = x * BITS_PER_PIXEL;
uint32_t x_byte = x_pos / 8;
uint32_t x_bit = x_pos % 8;
uint8_t c = (uint8_t) color;
constexpr uint8_t mask = (1 << BITS_PER_PIXEL) - 1;
if (x_bit + BITS_PER_PIXEL > 8) {
line.data[x_byte] &= ~(mask << x_bit);
line.data[x_byte] |= c << x_bit;
x_byte++;
line.data[x_byte] &= ~(mask >> (8 - x_bit));
line.data[x_byte] |= c >> (8 - x_bit);
} else {
line.data[x_byte] &= ~(mask << x_bit);
line.data[x_byte] |= c << x_bit;
}
set_dirty(y);
}
}

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/*
* Copyright (C) 2019 Max Regan
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "Bsp/SystemTime.h"
#include "Bsp/Drivers/LowPower.h"
#include "Bsp/macros.h"
#include "stm32l0xx.h"
uint32_t wakeups = 0;
namespace BSP {
using Common::ReturnCode;
ReturnCode LowPower::init()
{
enable_debug();
return ReturnCode::OK;
}
ReturnCode LowPower::enable_debug()
{
/* Enable Clocks */
SET(RCC->APB2ENR, RCC_APB2ENR_DBGEN);
SET(RCC->APB2SMENR, RCC_APB2SMENR_DBGSMEN);
SET(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
SET(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
SET(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
return ReturnCode::OK;
}
ReturnCode LowPower::disable_debug()
{
CLR(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
CLR(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
CLR(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
CLR(RCC->APB2SMENR, RCC_APB2SMENR_DBGSMEN);
return ReturnCode::OK;
}
ReturnCode LowPower::sleep()
{
// TODO: unimplemented
return ReturnCode::FAIL;
}
ReturnCode LowPower::stop()
{
SET(PWR->CR, PWR_CR_CWUF); // clear wakeup flag
while(PWR->CSR & PWR_CSR_WUF) {};
CLR(PWR->CR, PWR_CR_PDDS); // Enter stop mode when the CPU enters deepsleep
CLR(RCC->CFGR, RCC_CFGR_STOPWUCK); // MSI oscillator is wake-up from stop clock
SET(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); // low-power mode = stop mode
__WFI(); // enter low-power mode (Wake from interrupt)
wakeups++;
return ReturnCode::OK;
}
}

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/*
* Copyright (C) 2019 Max Regan
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#pragma once
#include "Bsp/ReturnCode.h"
extern uint32_t wakeups;
namespace BSP {
class LowPower {
public:
LowPower() = delete;
static Common::ReturnCode init();
static Common::ReturnCode sleep();
static Common::ReturnCode stop();
static Common::ReturnCode enable_debug();
static Common::ReturnCode disable_debug();
};
}

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/*
* Copyright (C) 2019 Max Regan
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "Bsp/Drivers/LptimPwm.h"
#include "Bsp/macros.h"
namespace BSP {
using Common::ReturnCode;
LptimPwm::LptimPwm(LPTIM_TypeDef *lptim)
: m_lptim(lptim)
{}
void LptimPwm::init_lptim()
{
/* Enable LPTIM in APB1 */
SET(RCC->APB1ENR,
RCC_APB1ENR_LPTIM1EN);
// Enable low-speed internal
RCC->CSR |= RCC_CSR_LSION;
while (!(RCC->CSR & RCC_CSR_LSIRDY)) {};
/*!< Set the LSE clock to be the source of the LPTIM */
SET_TO(RCC->CCIPR,
RCC_CCIPR_LPTIM1SEL,
RCC_CCIPR_LPTIM1SEL_0);
/** Write CR CFGR and IER while LPTIM is disabled (LPTIM_CR_ENABLE not yet set) */
/*!< Disable Interrupts (not needed, this is the default */
LPTIM1->IER = 0;
/*!< Reset
* ENC (Disable encoder mode)
* TIMOUT (disable timeout mode)
* TRIGEN (Trigger count start with software only)
* PRELOAD (Update ARR and CMP registers immediately after write)
* CKSEL (LPTIM is not using an input clock)
* COUNTMODE (LPTIM counter updated on every clock pulse)
* TRGFLT (Do not debounce triggers)
*/
CLR(LPTIM1->CFGR,
LPTIM_CFGR_ENC | LPTIM_CFGR_TIMOUT | LPTIM_CFGR_TRIGEN |
LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_PRELOAD | LPTIM_CFGR_CKSEL |
LPTIM_CFGR_COUNTMODE);
/*!< Set
* PRESC (Set prescaler to 128. Using 32kHz LSE as input, this should
* correspond to 250Hz counting.
*/
CLR(LPTIM1->CFGR, LPTIM_CFGR_PRESC);
SET(LPTIM1->CR, LPTIM_CR_ENABLE);
/*!< Do not modify ARR and CMP until after ENABLE bit is set */
/*!< Produce a 60Hz, signal with minimal "high" time. The display
only needs 2us of "high" time on EXTCOMM, and it draws a fair
amount of power. */
LPTIM1->ARR = 0x4FF;
LPTIM1->CMP = 0x4FE;
while(!(LPTIM1->ISR & LPTIM_ISR_ARROK)) {}
while(!(LPTIM1->ISR & LPTIM_ISR_CMPOK)) {}
/*!< Enable and start the timer */
SET(LPTIM1->CR, LPTIM_CR_CNTSTRT);
}
ReturnCode LptimPwm::init()
{
init_lptim();
/* Enable GPIO port A */
SET(RCC->IOPENR, RCC_IOPENR_IOPAEN);
/* Assign LPTIM1_OUT to PA7 */
SET_TO(GPIOA->AFR[0],
GPIO_AFRL_AFRL7,
1u << GPIO_AFRL_AFRL7_Pos);
SET_TO(GPIOA->MODER,
GPIO_MODER_MODE7,
2u << GPIO_MODER_MODE7_Pos);
CLR(GPIOA->OTYPER, GPIO_OTYPER_OT_7);
CLR(GPIOA->PUPDR, GPIO_PUPDR_PUPD7);
return ReturnCode::OK;
}
}

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/*
* Copyright (C) 2019 Max Regan
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#pragma once
#include "Bsp/ReturnCode.h"
#include "stm32l0xx.h"
namespace BSP {
class LptimPwm {
public:
LptimPwm() = delete;
LptimPwm(LPTIM_TypeDef *lptim);
Common::ReturnCode init();
private:
void init_lptim();
const LPTIM_TypeDef *m_lptim;
};
}

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/*
* Copyright (C) 2019 Max Regan
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <new>
#include "Bsp/Drivers/RtcDriver.h"
#include "Bsp/macros.h"
namespace BSP {
using Common::ReturnCode;
using Common::time_t;
RtcDriver::RtcSystemTimer RtcDriver::m_sys_timer;
ReturnCode RtcDriver::init()
{
init_hw();
return ReturnCode::OK;
}
void RtcDriver::enable_rtc_write()
{
/*<! Disable write protection */
RTC->WPR = 0xCA;
RTC->WPR = 0x53;
}
void RtcDriver::disable_rtc_write()
{
/*<! Enable write protection */
RTC->WPR = 0x00;
}
void RtcDriver::enable_periodic_alarm()
{
SET(RTC->ALRMAR, RTC_ALRMAR_MSK4 | RTC_ALRMAR_MSK3 | RTC_ALRMAR_MSK2 | RTC_ALRMAR_MSK1);
// Only calculate alarms when second rolls over
SET_TO(RTC->ALRMASSR, RTC_ALRMASSR_MASKSS, RTC_ALRMASSR_MASKSS);
SET(RTC->CR, RTC_CR_ALRAE | RTC_CR_ALRAIE);
SET(EXTI->IMR, EXTI_IMR_IM17);
SET(EXTI->EMR, EXTI_EMR_EM17);
SET(EXTI->RTSR, EXTI_RTSR_RT17);
}
ReturnCode RtcDriver::init_hw()
{
uint32_t temp = RCC->CSR;
SET(RCC->CSR, RCC_CSR_RTCRST);
SET(RCC->APB1ENR, RCC_APB1ENR_PWREN);
SET(PWR->CR, PWR_CR_DBP);
/*<! Set RTC input clock to the LSE (low-speed external 32.768kHz) clock */
if (!(RCC->CSR & RCC_CSR_LSERDY)) {
// TODO: Does this help?
SET(temp, RCC_CSR_LSEON);
}
SET_TO(temp, RCC_CSR_RTCSEL, RCC_CSR_RTCSEL_0);
SET(temp, RCC_CSR_RTCEN);
RCC->CSR = temp;
while (!(RCC->CSR & RCC_CSR_LSERDY)) {}
enable_rtc_write();
RTC->ISR = RTC_ISR_INIT;
while (!(RTC->ISR & RTC_ISR_INITF)) {}
/*<! Set the Clock Prescalers (32.768kHz / 1 / 32768 = 1Hz */
/*<! Set the Async prescaler to the Maximum (divide the clock by 128) */
// XXX reset to 0, this is to enable easier debugging
SET_TO(RTC->PRER, RTC_PRER_PREDIV_A, 0);
/*<! Set the Syncronous scaler so the RTC updates at 1Hz */
SET_TO(RTC->PRER, RTC_PRER_PREDIV_S, (LSE_CLOCK_FREQ - 1));
/*<! Load initial date and time */
// 12-Hour format
SET(RTC->CR, RTC_CR_FMT);
uint32_t time = 0;
SET(time, RTC_TR_PM);
SET_TO(time, RTC_TR_HT, 1 << RTC_TR_HT_Pos);
SET_TO(time, RTC_TR_HU, 2 << RTC_TR_HU_Pos);
SET_TO(time, RTC_TR_MNT, 5 << RTC_TR_MNT_Pos);
SET_TO(time, RTC_TR_MNU, 9 << RTC_TR_MNU_Pos);
SET_TO(time, RTC_TR_ST, 0 << RTC_TR_ST_Pos);
SET_TO(time, RTC_TR_SU, 0 << RTC_TR_SU_Pos);
RTC->TR = time;
CLR(RTC->ISR, RTC_ISR_INIT);
SET(EXTI->IMR, EXTI_IMR_IM20);
SET(EXTI->EMR, EXTI_EMR_EM20);
SET(EXTI->RTSR, EXTI_RTSR_RT20);
// Enable Wakeup interrupts, we may/will use them later
SET(RTC->CR, RTC_CR_WUTIE);
NVIC_EnableIRQ(RTC_IRQn);
NVIC_SetPriority(RTC_IRQn, 0);
enable_periodic_alarm();
disable_rtc_write();
return ReturnCode::OK;
}
ReturnCode RtcDriver::get_time(Common::WallClockTime &wall_time)
{
/*<! The value of TR in the shadow register is locked when SSR is
read (by the system timer), until the date register is read. We're
not using the date here, but we do need to clear the stale value. */
(void) RTC->DR;
// TODO: reread TR + PM for consistency
uint32_t time = RTC->TR;
unsigned int hours = 0, minutes = 0, seconds = 0;
hours += 10 * STM32_GET_FIELD(time, RTC_TR_HT);
hours += STM32_GET_FIELD(time, RTC_TR_HU);
minutes += 10 * STM32_GET_FIELD(time, RTC_TR_MNT);
minutes += STM32_GET_FIELD(time, RTC_TR_MNU);
seconds += 10 * STM32_GET_FIELD(time, RTC_TR_ST);
seconds += STM32_GET_FIELD(time, RTC_TR_SU);
if (STM32_GET_FIELD(time, RTC_TR_PM)) {
hours += 12;
}
new (&wall_time) Common::WallClockTime(hours, minutes, seconds);
return ReturnCode::OK;
}
ReturnCode RtcDriver::set_time(const Common::WallClockTime &wall_time)
{
enable_rtc_write();
RTC->ISR = RTC_ISR_INIT;
while (!(RTC->ISR & RTC_ISR_INITF)) {}
/*<! Load initial date and time */
// 12-Hour format
SET(RTC->CR, RTC_CR_FMT);
uint32_t time = 0;
SET_TO(time, RTC_TR_PM, wall_time.get_is_pm() << RTC_TR_PM_Pos);
SET_TO(time, RTC_TR_HT, wall_time.get_hours_12_tens() << RTC_TR_HT_Pos);
SET_TO(time, RTC_TR_HU, wall_time.get_hours_12_ones() << RTC_TR_HU_Pos);
SET_TO(time, RTC_TR_MNT, wall_time.get_minutes_tens() << RTC_TR_MNT_Pos);
SET_TO(time, RTC_TR_MNU, wall_time.get_minutes_ones() << RTC_TR_MNU_Pos);
SET_TO(time, RTC_TR_ST, wall_time.get_seconds_tens() << RTC_TR_ST_Pos);
SET_TO(time, RTC_TR_SU, wall_time.get_seconds_ones() << RTC_TR_SU_Pos);
RTC->TR = time;
CLR(RTC->ISR, RTC_ISR_INIT);
while ((RTC->ISR & RTC_ISR_INITF)) {}
while (!(RTC->ISR & RTC_ISR_RSF)) {}
disable_rtc_write();
return ReturnCode::OK;
}
ReturnCode RtcDriver::set_wakeup_in(Common::time_t wakeup_delay)
{
/*<! 2^64 / (1000000 * 32768) / 60 / 60 / 24 / 365 = ~17.85 This
value will only overflow for wakeup_delays > 17.85 years, so
this is fine. */
uint64_t delay_cycles = Common::Time::to_micros(wakeup_delay) * LSE_CLOCK_FREQ /
Common::Time::MICROS_PER_SEC;
enable_rtc_write();
/*<! If there is an ongoing wakeup, disable it */
if (RTC->CR & RTC_CR_WUTE) {
CLR(RTC->CR, RTC_CR_WUTE);
while (!(RTC->ISR & RTC_ISR_WUTWF)) {}
}
uint32_t wucksel = 0;
if (delay_cycles == 0) {
return ReturnCode::FAIL;
} else if (delay_cycles < 0x10000) {
delay_cycles /= 2;
wucksel = 3;
} else if (delay_cycles <= 0x20000) {
delay_cycles /= 4;
wucksel = 2;
} else if (delay_cycles <= 0x40000) {
delay_cycles /= 8;
wucksel = 1;
} else if (delay_cycles <= 0x80000) {
delay_cycles /= 16;
wucksel = 0;
} else {
#if 0
// TODO: implement longer delays using ck_spre as clock source
// TODO: the datasheet text and block diagram disagree- is it using clock_spre or clock_apre?
wucksel = 4;
delay_cycles >>= async_prediv; //
#else
return ReturnCode::FAIL;
#endif
}
SET_TO(RTC->WUTR, RTC_WUTR_WUT, delay_cycles - 1);
SET_TO(RTC->CR, RTC_CR_WUCKSEL, wucksel << RTC_CR_WUCKSEL_Pos);
SET(RTC->CR, RTC_CR_WUTE);
disable_rtc_write();
return ReturnCode::OK;
}
Common::time_t RtcDriver::RtcSystemTimer::get_time()
{
uint32_t new_secs, old_secs, ssr, subsecond;
do {
old_secs = m_seconds;
ssr = RTC->SSR & 0xFFFF;
new_secs = m_seconds;
} while (new_secs != old_secs);
new_secs = new_secs * LSE_CLOCK_FREQ;
/** SSR is a countdown register */
subsecond = (new_secs + LSE_CLOCK_FREQ - 1 - ssr) * Common::Time::MILLIS_PER_SEC / LSE_CLOCK_FREQ;
return Common::Time::millis(subsecond);
}
void RtcDriver::RtcSystemTimer::increment_seconds()
{
/** TODO: Atomic increment */
m_seconds++;
}
void RtcDriver::increment_seconds()
{
m_sys_timer.increment_seconds();
}
static uint32_t wakeup_alarms = 0;
extern "C" void RTC_IRQHandler()
{
// Clear the wakeup and alarm interrupts in the EXTI
SET(EXTI->PR, EXTI_PR_PIF20 | EXTI_PR_PIF17);
if (RTC->ISR & RTC_ISR_ALRAF) {
RtcDriver::increment_seconds();
CLR(RTC->ISR, RTC_ISR_ALRAF);
}
if (RTC->ISR & RTC_ISR_WUTF) {
wakeup_alarms++;
// Clear the interrupt in the RTC
CLR(RTC->ISR, RTC_ISR_WUTF);
// Disable the Wakeup timer (its periodic, but we use it as a
// one-shot timer
CLR(RTC->CR, RTC_CR_WUTE);
}
}
}

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/*
* Copyright (C) 2019 Max Regan
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#pragma once
#include <stdint.h>
#include "Bsp/SystemTime.h"
#include "Bsp/ReturnCode.h"
#include "Bsp/Time.h"
#include "stm32l0xx.h"
namespace BSP {
class RtcDriver final {
public:
RtcDriver() = delete;
~RtcDriver() = delete;
static SystemTimerImpl& get_system_timer() {
return m_sys_timer;
};
static Common::ReturnCode init();
static void increment_seconds();
static Common::ReturnCode get_time(Common::WallClockTime &tm_bcd);
static Common::ReturnCode set_time(const Common::WallClockTime &tm_bcd);
static Common::ReturnCode set_wakeup_in(Common::time_t wakeup_delay);
private:
static Common::ReturnCode init_hw();
static void enable_rtc_write();
static void disable_rtc_write();
static void enable_rtc_wakeup_interrupt();
static void enable_periodic_alarm();
static constexpr uint32_t LSE_CLOCK_FREQ = 32768;
static RTC_TypeDef *m_rtc;
class RtcSystemTimer : public BSP::SystemTimerImpl {
public:
RtcSystemTimer()
: m_seconds(0)
{}
~RtcSystemTimer() {}
Common::time_t get_time() override;
void increment_seconds();
private:
/** ~136 years. Good enough for me. */
uint32_t m_seconds;
static constexpr uint32_t LSE_CLOCK_FREQ = 32768;
};
static RtcSystemTimer m_sys_timer;
};
}

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/*
* Copyright (C) 2019 Max Regan
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "Bsp/Drivers/SpiDriver.h"
#include "Bsp/macros.h"
namespace BSP {
using RC = Common::ReturnCode;
using Common::Schedule::TaskScheduler;
using Common::Schedule::NextTime;
using Common::Time;
SpiDriver::SpiDriver(TaskScheduler &scheduler)
: m_scheduler(scheduler)
, m_spi(SPI1)
{}
void SpiDriver::init()
{
SET(RCC->IOPENR, RCC_IOPENR_IOPAEN);
SET(RCC->IOPENR, RCC_IOPENR_IOPBEN);
RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
/* Assign SPI_MOSI to PB1, since PA7 is taken by LPTIM_OUT */
GPIOB->AFR[0] &= ~GPIO_AFRH_AFRH1;
GPIOB->AFR[0] |= 1u << GPIO_AFRH_AFRH1_Pos;
SET_TO(GPIOB->MODER, GPIO_MODER_MODE1, 2u << GPIO_MODER_MODE1_Pos);
GPIOB->OTYPER &= ~GPIO_OTYPER_OT_1;
GPIOB->PUPDR &= ~GPIO_PUPDR_PUPD12;
// SPI1 NSS (PA4)
SET_TO(GPIOA->MODER, GPIO_MODER_MODE4, 1u << GPIO_MODER_MODE4_Pos);
GPIOA->OTYPER &= ~GPIO_OTYPER_OT_4;
GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD4;
// SPI1 SCK (PA5)
GPIOA->AFR[0] &= ~GPIO_AFRL_AFRL5;
SET_TO(GPIOA->MODER, GPIO_MODER_MODE5, 2u << GPIO_MODER_MODE5_Pos);
GPIOA->OTYPER &= ~GPIO_OTYPER_OT_5;
GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD5;
// SPI1 MISO (PA6)
GPIOA->AFR[0] &= ~GPIO_AFRL_AFRL6;
SET_TO(GPIOA->MODER, GPIO_MODER_MODE6, 2u << GPIO_MODER_MODE6_Pos);
GPIOA->OTYPER &= ~GPIO_OTYPER_OT_6;
GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD6;
// Enable Master mode and half the baud rate, so it's set to ~1MHz
m_spi->CR1 |= SPI_CR1_MSTR | SPI_CR1_LSBFIRST | SPI_CR1_SSM;
//m_spi->CR1 |= 1u << SPI_CR1_BR_Pos;
m_spi->CR2 |= SPI_CR2_SSOE;
}
NextTime SpiDriver::execute()
{
return NextTime::never();
}
RC SpiDriver::tx_blocking(const uint8_t *data, size_t len)
{
if (len <= 0) {
return RC::FAIL;
}
m_spi->CR1 |= SPI_CR1_SPE;
//FLIP(GPIOB->ODR, GPIO_ODR_OD3);
CLR(m_spi->CR1, SPI_CR1_SSI);
SET(GPIOA->ODR, GPIO_ODR_OD4);
for (size_t i = 0; i < len; i++) {
while (!(m_spi->SR & SPI_SR_TXE)) {}
m_spi->DR = data[i];
}
//FLIP(GPIOB->ODR, GPIO_ODR_OD3);
while (!(m_spi->SR & SPI_SR_TXE)) {}
// Ensure that NSS is held for long enough to meet the display's thSCS
for (int i = 0; i < 4; i++);
m_spi->CR1 &= ~SPI_CR1_SPE;
SET(m_spi->CR1, SPI_CR1_SSI);
CLR(GPIOA->ODR, GPIO_ODR_OD4);
return RC::OK;
}
}

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/*
* Copyright (C) 2019 Max Regan
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#pragma once
#include "Bsp/ReturnCode.h"
#include "Bsp/TaskScheduler.h"
// TODO: Find a better include for this
#include "stm32l0xx.h"
namespace BSP {
class SpiDriver : public Common::Schedule::Task {
public:
// TODO: Add configurability / provide a real abstraction
SpiDriver(Common::Schedule::TaskScheduler &scheduler);
void init();
Common::Schedule::NextTime execute() override;
Common::ReturnCode tx_blocking(const uint8_t *data, size_t len);
private:
Common::Schedule::TaskScheduler &m_scheduler;
SPI_TypeDef *m_spi;
};
}